Substantial progress has been realized in both understanding the nucleation and growth of GaAs/Si and demonstration of device application of this technology. In this paper, we review the recent progress in the role of the Si surface, initial nucleation, the GaAs/Si interface, GaAs thick layer growth and defect generation and control in the GaAs layer. This last area is the remaining area where substantial progress is still required. Several new approaches for defect control are discussed.

Recent successes, such as the demonstration of a 1K SRAM, have established epitaxial GaAs on Si substrates as a promising technology rather than a device designer's dream. For the first time we can seriously consider combining the individual electronic and optical properties of GaAs and Si within a single epitaxial structure. Applications for GaAs on Si range from those that simply utilize the Si as a low-cost, large-areapassive substrate with superior strength and thermal conductivity to the long-sought multifunction integrated circuits where Si and III–V components are integrated within a single monolithic chip. This paper will attempt to provide a realistic appraisal of the potential applications of epitaxial GaAs on Si with emphasis on the special demands imposed by each application and barriers that must be circumvented.

Growth technique dependent factors are compared for molecular beam epitaxy (MBE) and organometallic chemical vapor deposition (OMCVD) that are related to the GaAs on Si epitaxy. The comparison, both for growth processes and as-grown material characteristics, indicates that material qualities of these layers provided by the two growth techniques are comparable in many aspects, but differ in morphological texture, residual stress, and occasionally Schottky barrier height. These issues are discussed further with our recent OMCVD results in order to ensure the OMCVD advantages for GaAs on Si wafer engineering, which are referred as an easy scale-up and a large throughput.

Primitive (001) surfaces contain only biatomic (ao/2) steps and thereby provide a topological way of suppressing antiphase domain formation in polar materials heteroepitaxially grown on nonpolar (001) substrates. We show that thermodynamic equilibrium is a necessary and sufficient condition to form primitive (001) Si surfaces due to a π-bonded step reconstruction that lowers the relative enthalpy of reconstructed [110] biatomic steps by 0.04 eV per step atom, and to correlation, which freezes out the step configurational entropy thereby suppressing the formation of all other types of steps. Implications for general vicinal (001) Si surfaces are discussed.

Reflection high energy electron diffraction (RHEED) measurements indicate that the adsorption of As on misoriented Si(100) surfaces drives a multilayer step transition. We find that the formation of multilayer steps is a strong function of substrate temperature and As pressure. Monolayer steps are metastable at low substrate temperature or As pressure. The subsequent nucleation and growth of GaAs by molecular beam epitaxy (MBE) is controlled by the initial Si step distribution. Single domain GaAs grown on the monolayer stepped substrate has Ga terminated steps. Conversely, single domain GaAs grown on the multilayer stepped substrate has As terminated steps.

We compare the dynamic responses of reflection high energy electron diffraction (RHEED) and optical reflectance-difference (RD) signals caused by abrupt changes in incident fluences of Ga and As during MBE growth of GaAs on (001) GaAs. Our results reveal that RHEED and RD originate mainly, although not completely, from structural order and chemical bonding, respectively, and thus provide complementary information for real-time studies of MBE growth. We also measure the wavelength dependence of the RD spectrum and show that it can be described approximately from 2 to 4 eV by a single Lorentzian absorption line centered at 2.4 eV.

Residual stress in molecular beam epitaxially (MBE) grown GaAs films on 4°-off (100)Si substrates is investigated with X-ray diffraction technique. It is experimentally confirmed that the GaAs lattice suffers tetragonal deformation with the c-axis being [100]. The GaAs lattice tilts by approximately 0.2° towards the tilted direction of the substrate. It is found that two-dimensional compressive stress dominates in GaAs films thinner than 0.3 μm in thickness, while two-dimensional tensile stress dominates in thicker films. The variation of the stress is understood in terms of a combination of misfit stress and thermal stress. The residual tensile stress is larger than 1 × 109 dyn/cm2 in the films thicker than I pm. The effect of the stress on the reliability of semiconductor laser diodes is discussed.

The stress and strain of GaAs on Si grown by using strained superlattice intermediate layers and a two-step growth method are characterized by the photoluminescence, X-ray diffraction and the curvature radius. The strain of GaAs grown using strained superlattice intermediate layers is smaller than that grown by the two-step growth method.

The analysis contains an engineering method for the prediction of thermally induced stresses in single- and multilayered heteroepitaxial structures on a thick substrate. The examined stresses include 1) normal stresses acting in the film layers themselves and responsible for their ultimate and fatigue strength, and 2) interfacial stresses responsible for film blistering and peeling. The developed formulas are simple, visible, easy-to-use, and clearly indicate how material and structural characteristics affect the magnitude and the distribution of stresses and deflections. Some recommendations for smaller stresses in film structures are presented. The obtained results can be utilized as a guidance for an optimal physical design of multilayered heteroepitaxial structures used in Microelectronics.

The drift force exerted by a free surface, a coherent or a noncoherent interface on dopant atoms has been analyzed. We have considered a coherent or a noncoherent interface present in an epilayer of finite thickness. The difference in the shear modulus of the matrix and of the second phase is responsible for the configurational energy of a dopant atom in a coherent two-phase medium. On the other hand, the hydrostatic component of stress associated with a misfit dislocation in a noncoherent interface gives rise to a first-order size interaction. The drift forces are responsible for dopant diffusion towards a free surface or an interface. The diffusion equation including the drift term is solved using an eigen function expansion method with appropriate boundary conditions. The concentration profiles obtained from the analysis of the diffusion equation are in qualitative agreement with those obtained experimentally. The attractive drift force gives rise to a peak in the dopant concentration at the interface followed by a minimum near the interface. These calculations and the observed concentration profiles enable us to evaluate the interaction energy term of the dopants with free surfaces and interfaces and the dilatation associated with the point defects.

Gallium arsenide films grown on (211)Si by molecular-beam epitaxy have been investigated using transmission electron microscopy. The main defects observed in the alloy were of misfit dislocations, stacking faults, and microtwin lamellas. Silicon surface preparation was found to play an important role on the density of defects formed at the Si/GaAs interface.

Two different types of strained-layer superlattices, InGaAs/InGaP and InGaAs/GaAs, were applied either directly to the Si substrate, to a graded layer (GaP-InGaP), or to a GaAs buffer layer to stop the defect propagation into the GaAs films. Applying InGaAs/GaAs instead of InGaAs/InGaP was found to be more effective in blocking defect propagation. In all cases of strained-layer superlattices investigated, dislocation propagation was stopped primarily at the top interface between the superlattice package and GaAs. Graded layers and unstrained AlGaAs/GaAs superlattices did not significantly block dislocations propagating from the interface with Si. Growing of a 50 nm GaAs buffer layer at 505°C followed by 10 strained-layer superlattices of InGaAs/GaAs (5 nm each) resulted in the lowest dislocation density in the GaAs layer (∼;5×l07/cm2) among the structures investigated. This value is comparable to the recently reported density of dislocations in the GaAs layers grown on (100)Si substrates [8]. Applying three sets of the same strained layersdecreased the density of dislocations an additional ∼2/3 times.

InxGa11-xAs-GaAsl-yPy strained layer superlattice buffer layers have been used to reduce threading dislocations in GaAs grown on Si substrates. However, for an initially high density of dislocations, the strained layer superlattice is not an effective filtering system. Consequently, the emergence of dislocations from the SLS propagate upwards into the GaAs epilayer. However, by employing thermal annealing or rapid thermal annealing, the number of dislocation impinging on the SLS can be significantly reduced. Indeed, this treatment greatly enhances the efficiency and usefulness of the SLS in reducing the number of threading dislocations.

We have studied the nucleation, annealing and growth of GaP on Si substrates. Our findings are very similar to those reported for GaAs/Si. That is, dislocation density after I μm of growth is usually about 108 cm−2 surface morphology is best when a multi-temperature growth process is used and is dependent on the substrate orientation; antiphase domain density is minimized by misorienting the substrates. This commonality of results leads us to conclude that the elimination of interfacial contamination is more important in achieving good epitaxial growth of III-V compounds on Si than is the overcoming of lattice mismatch. In support of this hypothesis we present SIMS data revealing up to 2% of interfacial carbon and TEM observations of an amorphous interfacial phase. The carbon comes from the organometallic source and, we believe, reacts with the Si to form amorphous SiC, which disrupts the coalescence of GaP grains and produces lattice defects.

GaAs layers have been grown on porous silicon (PS) substrates by molecular beam epitaxyNo surface morphology deterioration was observed onGaAs-on-PS layers in spite of the roughness of PS. A 10% Rutherford backscattering spectroscopy (RBS) channeling minimum yield for GaAs-on-PS layers as compared to 16% for GaAs-on-Si layers grown under the same condition indicates a possible improvement of crystallinity when GaAs is grown on PS. Transmission electron microscopy (TEM) reveals that the dominant defects in the GaAs-on-PS layers are microtwins and stacking faults, which originate from the GaAs/PS interface. GaAs is found to penetrate into the PS layers.

GaAs epitaxial layers grown on Si substrates up to 4 inches in diameter by OMCVD are characterized with respect to the materials parameters important for their application for device and circuit manufacturing. The layers are characterized using commercial flatness and surface quality measurement instrumentation, x-ray diffraction, Schottky diode characteristics, and photoluminescence. The 4-inch diameter GaAs epilayers are a singleoriented phase and are of comparable quality to GaAs epilayers grown on smaller diameter Si substrates.

In the direct growth of GaAs on Si by MOCVD the overall quality of the heteroepitaxial film is controlled to a large extent by the growth parameters of the initial GaAs buffer layer. We have investigated the structural properties of this layer using Rutherford Backscattering Spectrometry (RBS) and X-ray double crystal diffractometry. The crystallinity of the buffer layer was observed to improve with increasing layer thickness in the range 10–100nm, and then to rapidly degrade for thicker layers. High temperature (750°C) annealing of the buffer layers resulted in considerable reordering of all but the thicker (>200 nm) layers. Alteration of the usual GaAs/Si growth sequence to include an in-situ anneal of the buffer layer after growth interruption yielded GaAs films with improved structural, optical and electrical properties.

The growth mechanism and lattice defects are studied for GaAs/Si grown by the two-step MOCVD growth procedure using transmission electron microscopy (TEM). The large misfit stress between GaAs and Si is relieved by misfit dislocations at the GaAs/Si interface, which are introduced during epitaxial regrowth of the thin (<200A) polycrystalline buffer layer grown at 400∼450°C. The regrown buffer layer is relaxed to a nearly stress free state, and therefore a thick GaAs layer can subsequently be grown at the higher growth temperature (∼750°C). The tensile stress in GaAs at room temperature is shown to be a direct consequence of the misfit stress relaxation at the higher growth temperature. TEM revealed high density (<106cm−2) of the threading dislocations in the GaAs layer, contrary to the results of molten KOH etching.

Despite the 4.2% lattice mismatch, several laboratories have demonstrated that the quality of GaAs grown on Si is high enough for practical device applications [1–5]. At the GaAs/Si interface, a dislocation density of roughly 1012cm−2 is required to accommodate the mismatch. Therefore various techniques of dislocation filtering are necessary to provide material with acceptable dislocation counts. Among these techniques are the use of tilted substrates, strained layer superlattices, and intermediate layers.

Defect structures in thin, MBE grown, GaAs/Si(001) heteroepitaxial films were studied with grazing incidence x-ray scattering techniques. The diffuse scattering associated with GaAs having the predominant epitaxial orientation varied strongly with the penetration depth of the x-rays. Well directed streaks corresponding to planar faults were observed and easily distinguished from a broad and more randomly oriented background. Bragg peaks corresponding to twinned GaAs were also studied. The probability of twinning was seen to be much higher about the {111} planes whose normals, when projected onto the sample surface, lay parallel to the off-orientation direction than about the {111} planes whose normals, when projected onto the sample surface, lay perpendicular to the off-orientation direction. The intensity and breadth of the twin reflections were analyzed to estimate the corresponding defect density. The depth dependence of the twinning probability was seen to vary with growth parameters.

Raman scattering is measured along a bevel etched GaAs epitaxial film grown on Si by molecular beam epitaxial (MBE). From the correlation length profile of Raman scatteringmost dislocation lines are confined in the 2000Å regions close to the interface. The strain profile calculated from the Raman peak shift shows that about 0.6% compressive strain exists near the interface because of lattice mismatch. However, as one moves away from the interface, the compressive strain is gradually counterbalanced by thermal expansion. Transmission electron microscope (TEM) studies of the local dislocation image and properties show that an ultra clean Si surface is essential for dislocation confinement. From high resolution TEM, we find that the distance between dislocations at the interface is nonuniform, varying from 50Å to 125Å with an average distance at 81Å. Finally, a GaAs p-i-n photodetector on Si substrate is fabricated. Even though a normal photoresponse curve is obtained, the high dark current (50nA) and relatively low responsivity (0.01A/W) show that the material quality needs to be further improved to make a minority carrier vertical transition device.