Ripple pyrometry was proposed by Accufiber as a method for measuring wafer temperature in lamp-heated ovens. The technique obtains the wafer temperature from the wafer emittance radiation by simultaneously determining the effective emittance of the wafer and suppressing the interference from reflected lamp radiation. This paper reviews the technique for rapid thermal annealing and presents experimental results on silicon wafers instrumented with thermocouples and on processing blanket-film monitor wafers.

Two complementary speckle techniques for the measurement of temperature from the rough back surface of Si wafers during rapid thermal processing are demonstrated. Electronic speckle pattern interferometry is a full field intensity cross-correlation technique that provides a two-dimensional map of the surface temperature. Measurements are presented that demonstrate a resolution of ∼ ±2°C. A new speckle technique, sub-feature speckle interferometry is introduced. This technique provides a much more rapid and precise averaged temperature measurement by monitoring the strain between two points with interferometric precision usually associated with moird interferometry or holography rather than speckle. Preliminary measurements are presented that demonstrate the capability of the technique.

The infrared transmission technique for the measurement of silicon wafer temperature has been extended to metallized wafers. For wafers with partial metal coverage, a single-pass method has been demonstrated from 200°C to 550°C. For wafers with blanket metal coverage, a novel double-pass infrared transmission technique is presented.

Deposition of monolayer scale Ge/Si heterostructures by Rapid Thermal Chemical Vapor Deposition has been achieved for the first time. All previous work in this area was by Molecular Beam Epitaxy. We have observed the change in Ge growth rate at 500°C as the Si substrate was covered by the first monolayer of Ge. Auger Electron Spectroscopy and Raman scattering experiments determined that the CVD growth mode for Ge on Si (100) at 550°C is Stranski-Krastanov, with the transition to islanding occurring after three monolayers.

We report the first chemical vapor deposition growth and systematic photoluminescence study of strained Si1–xGex alloy layers on < 110 > Si substrates. Compared to < 100 > Si substrates, the same growth conditions yielded a slightly lower Ge composition, but a much lower growth rate. For thick layers, the relaxation along [110] direction is insufficient and lead to predominantly uniaxial strain in the the films. From the photoluminescence, the bandgap of strained Si1–x.Gex on < 110 > Si for 0.16 ≤ x ≤ 0.43 is determined and compared to theory. A strong “no-phonon” emission process in photoluminescence spectra of strained < 110 > Si/Si1–x.Gex/Si was observed as compared with that observed in < 100 > layers. Finally, quantum confinement shift of Si/Si0.71 Ge0.29/Si wells with a confinement energy up to 110 meV has been observed by varying the well width from 133 Å to 17 Å.

In this work, we have studied boron doped multi-layer epitaxial structures as active regions of deep submicron (< 0.25 gtm)metal oxide silicon field effect transistors (MOSFETs).The structures were formed by ultra high vacuum chemical vapor deposition (UHV-RTCVD) using Si2H6 and B2H6 as the source gases and H2 as the carrier gas at 750°C - 800°C and at a total pressure of 80 mTorr. With the high growth rates provided by Si2H6, thermal budgets were kept below the limit of boron diffusion in Si resulting in extremely abrupt doping transitions pushing the depth resolution limits of secondary ion mass spectroscopy. The structures consist of three epitaxial layers with thicknesses ranging from 100 A to 625 T. The top layer on which the gate oxide is formed is lightly doped (lxl016 cm-3) to minimize vertical electrical field and ionized impurity scattering for higher MOSFET channel mobility. The second layer is doped to lx1018 cm-3 for suppression of punchthrough short channel effects and finally the third layer is doped to lx 1017 cm-3 to decrease the parasitic source/drain junction capacitance that will result from the relatively high doping density of the intermediate layer. To minimize dopant diffusion in Si, low temperature (or low thermal budget) processes were employed for gate oxidation and polysilicon implant activation. A typical source/drain activation anneal was also included in sample preparation in order to simulate complete MOSFET fabrication assuming remaining steps could be carried out at lower temperatures with little contribution to dopant diffusion. Our results indicate that after all process steps a lightly doped region can still be obtained under the gate oxide with sufficient thickness to contain the MOSFET inversion layer. In these structures, the threshold voltage is determined by the doping density and thickness of the top two layers and can be easily tailored to the desired value by optimizing these parameters. With the range of parameters used in this study, our measurements show threshold voltages within the range desired for 0.1 µm MOSFETs.

Pseudomorphic Ge0.12Si0.88 films 265 nm thick grown by molecular beam epitaxy on p- Si(100) substrates were implanted with 100 keV 31P at room temperature for a dose of 5 x 1013/cm2. The projected range of the implanted P is about half the epilayer thickness. The implanted layers, together with non-implanted virgin samples, were subsequently annealed by both rapid thermal annealing in nitrogen and by steady-state furnace annealing in vacuum. The damage and strain of the annealed layers were studied by 4He channeling and x-ray doublecrystal diffraction. For a dose of 5 x 1013 P /cm2, both the damage and strain introduced by implantation can be completely removed, within instrumental sensitivity, by rapid thermal annealing at 700 °C for 10 - 40 s. Furnace annealing at 550 °C for 30 min for this sample removes most of the damage and strain induced by implantation. Furnace annealing at 700 °C or higher worsens the crystallinity of the layer and the strain relaxes. Hall measurements were performed on the same samples. Furnace annealing cannot achieve good dopant activation without introducing significant strain relaxation to the heterostructure, while rapid thermal annealing can.

SiH4 and GeH4 Deposition and In-Situ Doping of SiGe/Si Strained Heterostructures by Rapid Thermal Process Very Low Pressure Chemical Vapor Deposition method have been studied in this paper. Ge incorporation rate increases to a maximum value and then decreases as temperature increases, the growth rate of SiGe alloy reaches its maximum value and then decreases as Ge composition increases. Ge incorporation also enhances Si deposition rate in SiGe alloy. The Boron and Phosphorus doping would change thegrowth rate of SiGe layers and the sharp doping interfaces in SiGe/Si heterostructures have been obtained.

In this paper we report the influence of H2 on Ge surface segregation in Si/SiGe heterostructures. The sample were grown on Si(001) substrate tinder different gas flow of H2 by RTP/VLP-CVD. Auger electron energy spectroscopy(AES) has been used to determine the Ge distribution in Si/SiGe heterostructures. The results indicate that H2 can strongly alter the mechanism of Ge surface segregation and change the distribution of Ge atoms.

In-situ Spectroscopic Ellipsometry as a function of time is used to follow the growth of Si/SiGe Multi Quantum Well (MQW) structures. It provides both the starting surface control and the growth parameters understanding (thickness, growth rate, Ge content). Si and SiGe optical data were recorded at different temperatures on individual Si and SiGe layers. Using the measured indices and the known thicknesses of the layers, the experimental MQW data are fitted without adjustable parameters.

The Giant Magnetoresistance effect with high field-sensitivity was recently discovered in multilayers of alternating ferromagnetic and non-ferromagnetic layers. Some of these layer structures may find industrial application in miniaturized sensor and high-density digital magnetic recording technologies which require materials with large changes in electrical resistance at low magnetic fields.

In this paper we report on Rapid Thermal Annealing experiments done on a series of multilayers of alternating thin permalloy (Ni80Fe20) and silver films. The layers were sputter deposited on thermally oxidized Si (100) substrates. Samples were annealed in nitrogen at temperatures ranging from 280 to 340 °C for 30 seconds to 10 minutes, yielding magnetoresistance data as high as 5% and a maximum field sensitivity of 4.6% per kA.m-1. X-Ray diffraction analysis, showing the gradual formation of an Ag (111) shoulder peak at 20 = 38.3° upon annealing, supports a recently published hypothesis that the appearance of the GMR effect is annealinduced by a change of the microstructure due to diffusion, causing notching and disruption of the permalloy layers in the superlattice.

We present an investigation on the photo and electroluminescence of rapidly thermally oxidized porous silicon.

Chemical and mechanical stability of porous silicon layers (PSL) is the prerequisite of any active (luminescent) or passive (e.g. porous substrate) integrated applications. In this work X-ray diffraction (XRD) was used to analyze quantitatively the strain distribution obtained in different morphology PSL that were prepared on (100) p and p+Si substrates. Tetragonal lattice constant distortion can be as high as 1.4% in highly porous “as-prepared” samples. Incoherent optical heating RTO is governed by the absorption in the oxidized specimen. PSL show vertical inhomogeneity according to interpretation of spectroscopic ellipsometry (SE) data. Oxygen incorporation during RTO is controlled by specific surface (in p+ proportional, in p inversely proportional with porosity), while the developing compressive stress depends on pore size, and decreases with porosity in both morphologies.

An overview of silicide formation by rapid thermal processing is presented. Recent progresses on device applications, phase formation, growth kinetics, thermal stability, epitaxial growth, formation of metastable phase, vacancy ordering in rare-earth silicides and Ti-based shallow junctions involving rapid thermal processing are used as examples to highlight the applications of rapid thermal processing in connection with silicide formation.

Sputtered deposited titanium films on silicon substrates were used to study the effects of first rapid thermal anneal temperature, duration of anneal time and thickness of the titanium films for TiSi2 formation. A central composite, coupled with a cross design was used to analyze response surface. Empirical models were developed and contour plots were generated to describe the outcome of the first anneal. A window of operation to control the process of titanium silicide formation was recommended. Response surface analysis of data revealed an operating window of ±10° C for RTA1 for stable TiSi2 formation. Within this window of operation, the within wafer uniformity was found to be at its minimum. Anneal time was found to have minimum effect on the variability although sheet resistance decreases monotonically with increasing anneal time. Thickness of titanium films were found to be very critical in determining final TiSi2 thickness as determined by RBS and/or XRF techniques.

Secondary ion mass spectrometry (SIMS) and X-ray photoelectron spectroscopy (XPS) are used to investigate Ti silicide formation mechanisms on a series of Ti on Si thin films annealed in ultrahigh vacuum (UHV) at different temperatures and durations. The competition between oxygen diffusion and the silicide formation reaction (the socalled “snowplough” effect) is observed directly, as well as a Ti-Si-O layer. The results from these controlled experiments are compared with those from Ti silicide films formed under rapid thermal annealing (RTA) conditions in a production furnace, with and without a TiW barrier layer.

Today there are many investigations of titanium nitride (TiN) deposition as diffusion barriers in microelectronics, especially with Chemical Vapor Deposition (CVD) techniques. In our newly developed Rapid Thermal CVD (RTCVD) process, we combine the conventional LPCVD process of TiN using titanium (IV) chloride and ammonia with the advantages of a RTCVD reactor. With regard to the ability of fast temperature change especially to reach the anneal temperature and to cool down to room temperature in the annealing ambient, it is possible to perform the entire processing sequence within one single processing chamber. The influences of deposition temperature, as well as the effects of the temperature during a subsequent in situ anneal step on the properties of the layers is analyzed. TiN layers with a specific resistivity as low as 250 μΩ-cm even at deposition temperatures of 450 °C are obtained. The resistivity of the layers and the chlorine content is nearly half of the films without an anneal step. The capability of these layers for ULSI application is shown by depositing TiN in submicron contact holes with a step coverage of nearly 100 %.

In TiSi2 metallized devices, the second distribution of leakage current (I>lμA) is caused by the Si/TiSi2 interface roughness. In this work, 40gm thick Ti films are sputtered onto Si waters. RTA was done in N2 atmosphere. Heating rates of 0, 0.5, 1, 5, and 100°C S−-1 are examined. Samples are characterized by AFM, RBS, XRD and laser light scattering methods. The parameters related to roughness are heating rate sensitivity and oxygen contamination which decreases the roughness on the interface.

We report on the formation of AuZn/p-GaAs ohmic contacts by short time annealing either in open or closed configuration with a dielectric or metallic capping layer. Quantitative determination of the amount of arsenic losses was of primary concern. This was studied using the Cr-collector method, applying three types of collectors all of them using 100 nm thick Cr film for seizing evaporative As losses. In the first type, the Cr film was deposited onto oxidized Si substrate. In the second type - quartz substrate was used for the deposition of chromium film while the third collector used natural mica as a substrate for the Cr film. The obtained results show that the loss of arsenic is reduced below 2×1014 atom/cm2 using thin 20 nm Au/10 nm Zn/60 nm Au metallization annealed with a capping layer at 440°C for 15 sec. Electrical measurements indicate that under these conditions good ohmic contacts are obtained.

We have characterized TiN/Si and TiN/SiO2/Si structures by utilizing the variable energy positron beam spectroscopy (VEPBS) and x-ray photoelectron spectroscopy (XPS). Thin films of TiN were grown on SiO2/Si and Si by chemical vapor deposition and sputtering. Details of the electronic structure, microstructural defects, and interface are probed by implanting monoenergetic positrons at varying depths and analyzing the resulting positron-electron annihilation gamma rays. This analysis provides results for the positron diffusion length in different parts of the layered structure. Being sensitive to the presence of lattice defects, the positron diffusion length can be used to assess the quality of the film. The XPS measurements provide details about the elemental composition and interface in these materials.