Theoretical chemical mechanical polishing local planarization models as a function of polishing time and film removal are reviewed, and re-derived in a systematic and correlative way. The derived models employ pad viscoelastic and relaxation properties to explain the experimental phenomena that step height local planarization is an exponential function of line width at the same line density, and also account for the affect of pattern density and polishing of two different materials at the same time on step height planarization.

As the demand for planarity increases with advanced IC technologies, nanotopography has arisen as an important concern in shallow trench isolation (STI) chemical mechanical polishing (CMP) processes. Previous work has shown that nanotopography, or small surface height variations on raw wafers 20 to 50 nm in amplitude extending across millimeter scale lateral distances, can result in substantial CMP-induced localized thinning of surface films such as oxides or nitrides used in STI [1]. This interaction with CMP depends both on characteristics of the wafer such as heights and spatial wavelengths of the nanotopography, and characteristics of the CMP process including the planarization length or pad stiffness.

In this paper we review and extend the previous work on modeling of nanotopography. Three approaches to predicting the post-CMP oxide thinning due to nanotopography are compared. The first approach is the simplest, where a statistical aggregate effect is computed. Following the work of Schmolke [2], a transfer coefficient α is found which captures the portion of the nanotopography that is correlated with the final oxide thinning. The second approach is the most detailed, depending on explicit numerical simulation of pad elastic properties. In this case, a contact wear simulation is used to produce a detailed map of oxide thickness corresponding to any given pre-measured nanotopography wafer surface. The third approach is a signal processing method, sitting somewhere between the previous two extremes in terms of approximation and complexity. In this last case, a two-dimensional transfer function is extracted which captures the spatial smoothing accomplished by CMP. This filter can then be applied efficiently to premeasured nanotopography maps for other wafers to predict the final oxide thicknesses.

We also propose a predictive mapping of post-CMP oxide or nitride thicknesses to provide insight into the relative goodness of a wafer measured for nanotopography which is to be subjected to a CMP process. Specifically, we suggest that for post-CMP impact, maps and computation of areas having insufficient oxide clearing, or having final nitride thickness outside of required ranges, are useful and practical. Such device failure potential maps complement the fundamental nanotopography height map data and metrics based directly on that data, and enable evaluation, comparison, and development of improved wafers and STI CMP processes.

Development of semiconductors has proceeded according to broad frameworks such as the International Technology Roadmap for Semiconductors (ITRS). A key development in semiconductor technology involves the adoption of several new materials, such as Cu, low-k and high-k materials, and noble metals in capacitors, transistors, and/or interconnects. These developments will likely lead to wider application of the planarization process to new processes and new materials, and call for even stricter planarization performance requirements. One example involves planarizing Ag interconnects with an optimal cap layer configuration for reducing RC delays. The Cu interconnect process is currently used to reduce wire resistivity. One material that has been proposed as a successor to Cu is Ag. Many low-k materials have been developed with the goal of reducing dielectric constant (k). However, damascene design and matters such as cap layer configuration are also important considerations in reducing the effective dielectric constant (k eff). Our report herein begins by proposing Ni-B deposited by electroless plating as a candidate cap material, due to the following characteristics: (1) it offers good selectivity for Ag interconnects; (2) it provides good barrier effects through thermal processes; and (3) it provides good controllability of deposition rates. Next, we report that Ag damascene with Ni-B cap layer can be realized through electroplating and polishing of Ag interconnects. Although Ag polishing technologies are currently not fully developed, we suggest that they may nevertheless be successfully applied to polish Ag.

We investigated pattern density effects during chemical mechanical planarization (CMP) for shallow trench isolation (STI) applications using fixed abrasive pads to better control the fixed abrasive polishing process. We observed that the polishing characteristics of higher pattern density features are strongly dependent on the presence of lower pattern density features on the same die in the wafer. This has been attributed to the aggressive action of lower pattern density features on the fixed abrasive pad which results in a more effective activation of the pad by them. Thus even the 100% pattern density features are initially polished at a very high rate when lower density features are present.

Topography after Cu CMP is one of the main issues in constructing reliable Cu interconnects. The wafer level topography is greatly influenced by many polishing properties such as removal non-uniformity and planarization efficiency, and also by many polishing variables. Among the variables, Cu deposition thickness and over polishing time are easily controllable, and closely related to the topography. For a given polishing condition, the topography can be minimized through the optimization of Cu deposition thickness and over polishing time. A model is proposed to account for the correlation between these variables and the wafer level topography. Numerical result of this model shows a strong dependency of optimized Cu deposition thickness and over polishing time on the removal non-uniformity, dishing susceptibility and over plated bump size.

We investigate the fundamental atomistic processes in chemical mechanical polishing of copper, by simulating the nanoscale polishing of a copper surface by a single abrasive particle. The atomistic mechanisms of an individual surface-polishing event are simulated with molecular dynamics using the embedded atom method. The nature of material removal, chip formation, material defects and frictional forces were investigated as a function of the cutting speed, depth of cut, and abrasive geometry. Nanometric cutting comprises of two steps: material removal as the tool machines the top surface, followed by relaxation of the work material to a low defect configuration, after the tool or abrasive particle has passed over the machined region. Chemical etching processes during planarization considerably improve the quality of the planarized surface and reduce defects in the bulk.

Black Diamond (BD) is gaining popularity as a low k dielectric for copper/low k integration. However, because of lower hardness and more hydrophobic in nature of BD film surface comparing with those of the conventional oxide, some specific defects appear during CMP process of Cu/BD patterned wafers. In this study, the patterned wafer inspection systems, AIT II, and SEM review station are used to review and to classify such defects generated from CMP process. Using conventional Cu/Oxide CMP process, the percentage of these specific defects from Cu/BD CMP is typically more than 60 of total defect count. By modifying the composition of slurry with new additives and optimization of polishing and cleaning parameters, the total defect count can be reduced by 80%, in which the amount of specific defects is less than 5% of total defect count.

Abrasive-free Cu CMP solutions have been developed to reduce micro-scratches and obtain minimized dishing and erosion properties. During the development of the solutions, some electrochemical examinations were performed. One of the most instructive knowledge was obtained through the Tafel plot. Other attractive data were obtained through Cu complex film analysis. On the basis of these studies were developed and released newly formulated abrasive-free Cu CMP solutions with a high Cu removal rate and excellent topography performance. Mechanism of polishing by applying abrasive-free Cu CMP solutions is also discussed in this paper.

Highly selective 2nd step copper slurries developed by Rodel have efficient barrier (TaN) polishing rates at extremely low down force (1000 Å/min at one psi, and 2000 Å/min at 3 psi). Removal rates of dielectrics (TEOS or low k CDO) can be independently adjusted from zero to nearly any designed value and copper removal rates can be independently controlled from 20 to 500 Å /min, while maintaining the high barrier removal rates. In addition, zero loss of low-k dielectric capping layers has been demonstrated, and zero loss of high metal density (90%) domain of pattern wafers with 30 seconds overpolishing has been demonstrated. Experiments also show that the high selectivity is a true CMP effect and not due to static etching.

In this work novel slurries both for copper and tantalum nitride removal were developed. In the first step the Cu bulk is removed, by using high selective slurry, which stops on the underlying TaN barrier. The selectivity of Cu vs. TaN achieved with this slurry is larger than 1/100. High selective second step slurry is further introduced for removing the barrier material. In the present work data concerning dishing and erosion will be presented as a function of line width and pattern density across the wafer. Electrical yield measurements on shorts and opens of meander-fork structures will be discussed.

The commercially available abrasive containing slurries for copper CMP have shown some advantages in high removal rates, low friction at low down force, and minimal to no copper residues, regardless of the polisher architecture, either rotary, orbital, or linear polishing. However, the abrasive containing slurries have some disadvantages such as high dishing and erosion with more micro-scratches due to the presence of abrasives. In contrast, the abrasive free polishing slurry has lower removal rate, and seems to be sensitive to polishing architecture, but it has good planarization, low topography, less micro-scratches, and most importantly is insensitive to over-polish.

At this stage, the best results for copper CMP are being achieved by the use of the multi-step and multi-slurry process in which copper is polished first, and barrier layers are polished with a different set of consumables. The intent of this paper is to focus on the first step, the copper removal step, and to compare different approaches for this first step; namely, the use of slurries containing abrasives with slurries that are free of abrasives on the orbital polisher. The combined process with low percent solid and small-sized abrasives for the bulk copper removal step and abrasive free polishing (AFP) slurry for the residual copper removal step on an orbital polisher has produced a very robust process window with excellent results including low topography, low erosion, insensitivity to over-polish and low cost of ownership.

A combined experimental and numerical approach has been devised to understand the abrasion aspects of material removal mechanisms of ductile copper film on silicon wafers during Chemical mechanical planarization. The experimentally observed trends of the deformation patterns and the force profiles from micro and nano-single scratch experiments are used to guide numerical simulation using finite element simulation at the continuum scale and molecular dynamics simulation at the atomistic scale. Such integrated approach has provided several plausible mechanisms for material detachments through a combination of surface plowing and shearing under the abrasive particles. The gained insights can be integrated into mechanismbased models for the material removal rate in these processes as well as addressing possible defect formation.

The properties of abrasive particles play a key role in chemical mechanical polishing (CMP). This study used well-defined dispersions of uniform particles, including spherical silica of varying diameters to polish Cu films and silica cores coated with nanosized ceria particles to polish oxide films. It was shown that the total surface area of the silica abrasives in the slurry controlled Cu material removal rate. However, pH, solid content, and particle size of ceria coated silica abrasives did not have a strong correlation to the removal rate of oxide films.

Hydrogenated silicon nitride, hydrogenated silicon carbide, and their intermediates were chemo-mechanically polished. Results showed that, within the material set examined, harder materials also have higher CMP removal rates. In addition, CMP rates for multilayer stacks did not follow those for single layers. Polish mechanisms were proposed to explain these phenomena.

Soaking of polyurethane-based CMP pad in oxide slurry, de-ionized water, and pH buffer solution, and its effect on thermal and mechanical properties of the pads was studied using Dynamic Mechanical Analysis and Modulated Differential Scanning Calorimetry. Pad softening due to soaking was established, and softening mechanisms are discussed. Diffusion of the aqueous medias to polyurethane pad was described using Fickian diffusion model.

The main objective of Chemical Mechanical Polishing (CMP) process is to planarize the metal or dielectric layers deposited on the wafer surfaces in microelectronics device manufacturing. In CMP, slurries containing submicrometer size particles and chemicals are used to achieve planarization. An effective polishing requires an optimal material removal rate with minimal surface deformation. Therefore, it is important to control the particle-substrate interactions that are responsible for the material removal and the particle-particle interactions, which control the slurry stability and consequently the defect density. This paper discusses the impact of interaction forces on polishing, and underlines the scientific guidelines to formulate consistently high performing CMP slurries.

An understanding of the pad surface state and its effect on the polishing process is critical to a more fundamental understanding of Chemical Mechanical Polishing (CMP). Vertical Scanning Interferometry has been shown to be a useful tool to monitor the pad surface state. In this paper, various techniques for analyzing pad surface data obtained using interferometry are described. The pad surface state can be modified through the manipulation of process and pad conditioner design parameters. Many of the parameters extracted from interferometry data show strong correlations with corresponding polish data. A careful analysis of these complementary data can yield significant insight into the mechanisms of CMP processes.

Mixed abrasive slurries (MAS) containing alumina/silica and alumina/ceria abrasives were evaluated for CMP of metal and dielectric films, respectively. MAS with 0.5wt% calcined alumina and 2.5wt% silica (fumed and colloidal) abrasives were highly selective to tantalum polishing over copper and oxide. Similarly, MAS containing 1.5wt% calcined alumina and 3wt% colloidal ceria particles offered a polish rate selectivity between silicon dioxide and silicon nitride films of more than 30, without any additives, without compromising finished surface quality. This improved performance appears to be a result of modified surface morphology as well as synergistic interactions between the chemical activity of silica or ceria and the hardness of the alumina.

Barrier CMP can reduce the topography generated during Cu CMP. In case of selective barrier CMP slurry like 1:10:1, it is expected that the topography reduction could not exceed the Ta thickness. Some recent observations made at Fujimi show that the topography reduction can be twice larger than the Ta thickness without dielectric loss. This paper presents the chemical mechanical phenomenon that is responsible for this 40 to 50 nm topography reduction during barrier CMP. At the end of the Cu CMP, Ta is exposed to oxidizer. This process can oxidize an important part of the Ta barrier which becomes Ta2O5 according to Pourbaix diagram [1]. Ta2O5 can be as much as 2.3X thicker than original Ta layer. This phenomenon explains why topography reduction can be twice higher than initial Ta thickness. This mechanism explains why after Cu CMP it is likely to have more than 30 nm dishing on copper lines. The last and more important consequence is that this reduces final topography and total copper metal loss at the same time by about 30 nm. Obviously very high selectivity Cu CMP slurry (Cu:Ta ∼ 1000:1) is necessary to have neither Ta erosion nor Ta2O5 erosion during copper CMP. High selectivity slurry is required during barrier CMP in order to reduce the loss of copper and Dielectric during Barrier CMP.

Intensive investigation of copper CMP over the past decade has revealed that consumable technology is of critical importance. There are several reasons for this, but all are ultimately due to the chemical and material properties of copper and associated barrier layers. Moreover, in comparison to conventional dielectric polishing, copper CMP (and, perhaps, metal CMP in general) is of a much more chemical nature. This is a consequence of the fact that metal removal generally requires an oxidation-reduction mechanism while, in contrast, dielectric removal typically requires only simple hydrolysis. As any chemist knows, oxidation-reduction reactions are often notoriously hard to control and easily upset by contaminants. Of course, contaminants can be intentionally added to the chemistry for beneficial purposes in which case they become known as “proprietary additives”.

In addition, to the removal chemistry, abrasive and pad technology has also undergone considerable evolution. Indeed, free abrasive, fixed abrasive, and abrasiveless technologies have all been developed. In the case of fixed abrasive polishing, this has required modification of the pads as well, however conventional and abrasiveless polishing can be carried out with conventional polyurethane pads. This picture is further complicated by the various available hardware configurations and the use of multiplaten processes.