We studied reverse leakage current in n+/p titanium-salicided shallow junctions using C49 Ti-silicide as a diffusion source. After Ti deposition, rapid thermal annealing (RTA) was performed to form the C49 Ti-silicide. Subsequently, arsenic ions were implanted and a 2nd RTA was carried out at 850 °C to form the low resistivity C54 Ti-silicide. In spite of no drive-in process following the 2nd annealing, the implanted As diffused well into Si substrate and the reverse leakage current of the n+/p junctions was reduced to two orders of magnitude lower. Since the high chemical affinity of As to Ti-silicide trapped the dopant in the silicide, it has been known that Ti or Ti-silicide cannot be used as a diffusion source. However, in this work, we found that the C49 Ti-silicide acted as a diffusion source of As ions. The reason of fast diffusivity is attributed to the generation of high tensile stress induced by As implantation.

The influence of stress on the enhanced formation of C54-TiSi2 phase has been investigated. Tensile stress induced by backside CoSi2 film on the silicon substrate has been found to enhance the growth of C54-TiSi2 on (001)Si. The thickness of amorphous interlayers (a-interlayers) between Ti films and silicon substrates was found to be thicker and thinner in the tensilly and compressively stressed samples, respectively. From auto-correlation function analysis, the thicker a-interlayer was found to consist of a higher density of crystallites. The crystallites provide nucleation sites for C49-TiSi2 and facilitate the formation of C49-TiSi2 of small size. The larger total area of C49-TiSi2 grain boundaries supplies more nucleation sites for the phase transformation of C49- to C54-TiSi2. Therefore, the tensile stress present in the silicon substrate promotes the formation of a-interlayer and decreases the grain size of C49- TiSi2, which increases the nucleation density of the C54-TiSi2 phase. As a result, the transformation of C49- to C54-TiSi2 phase is enhanced.

When scaling down the MOS technology, the increasing local mechanical stress induced during the Ti- and Co/Ti silicidation can exceed the critical shear stress on the {111}<110> active glide system in the silicon substrate. This results in the heterogeneous nucleation of 60° dislocations in the silicon substrate underneath the silicide line. In the case of an undoped silicon substrate, these dislocations nucleate at the edge of the silicide lines and are parallel with the [110] oriented line edge. This paper will investigate the effects of As and BF2 junction implantation and implantation defects on the stress developed during the silicidation reaction and on the nucleation and growth of the stress induced 60° dislocations in the silicon.

Titanium disilicide obtained by direct interaction between Si and a deposited Ti layer is a choice for low- resistance gate interconnections and source and drain areas. The properties of the TiSi2 film can be influenced by many factors; such as substrate nature and doping, the depositing Ti layer, structure dimensions [1][2][3][4]. This work is addressed to study the properties of TiSi2 film as obtained from titanium deposited by Ion Metal Plasma (IMP), which has recently been introduced in high aspect ratio contact and via applications.

Its suitability for titanium silicide formation is investigated here in comparison to standard PVD deposition. The study was carried out on flat and patterned samples. Titanium silicide formed on mono- Si substrates were characterized as a function of RTP temperature in terms of sheet resistance, tilm morphology, crystallography and phase evolution. It was found that the TiSi2 film obtained from IMP- Ti is very similar to the one obtained from PVD standard deposition. However, for annealing below 700°C, an increase in the sheet resistance of the TiSi2 C49 phase from IMP- Ti compared to the one from PVD- Ti was found, and is explained by different silicide grain size. Analyses performed on patterned samples with doped silicon and poly- Si lines show similar electrical results for TiSi2 from IMP and PVD deposition; however, fbr p+ poly-Si lines, the IMP samples displayed correct TiSi2 formation down to 0.18µm line width, while the PVD wafers showed discontinuous results at these minimum feature sizes.

In the application of selective CVD of titanium silicide to SOI devices, voids were observed at the bottom corner of the spacers, which caused reduction of drain current and in extreme cases formed an open circuit. Test structures were constructed to monitor void formation. It was found the voiding became serious when the thickness of the Si film was reduced. Adjusting the deposition condition by reducing the TiCi4 flow rate or by using a two-step deposition process was able to significantly reduce the chance of void formation. On very thin Si films, voiding can be prevented by depositing a selective Si layer prior to silicide deposition.

This paper examines the challenges for silicide contacts in current and future CMOS technologies and assesses the capability of TiSi2 and related materials, as well as CoSi2, to meet the technology requirements. Specific issues such as maintaining low resistance in narrow lines, source/drain silicon consumption, and silicide thermal budget, are discussed. In this regard we evaluate the salient features of the basic titanium salicide process, and variations such as alloying, implantation, selective CVD, and laser silicidation. Data are presented from recent experiments to assess progress in each approach towards meeting the necessary goals. Finally, projections of the future of silicide processing are given.

The effect of co-deposition method on the C49- to C54-TiSi2 phase transformation was investigated. Both the co-deposition ratio of TiSix layers and the deposition temperature were found to have a significant effect on the C54 phase transformation. The optimum composition to form C54 TiSi2 phase was x∼l.5 for room temperature deposition, and x∼2.0 for samples deposited at 400°C. The incorporation of a small amount of Mo had a beneficial effect on the C54 transformation in layers deposited at room temperature, but it had little effect in layers deposited at 400°C.

The presence of Mo, either implanted in Si substrate prior to Ti deposition or deposited at the interface between Ti and Si, leads to the formation of C54 TiSi2 at 600 °C. Without Mo, the C54 TiSi2 does not form below 700 °C. It is shown that the C54 TiSi2 formed with the implanted Mo of a nominal dose of 5x1014 at./cm2 and that formed with the deposited Mo of 0.09 nm average thickness, display similar microstructure properties. The preferential orientation of the C54 TiSi2 is <110> in the samples with implanted Mo or with 0.09 nm Mo interlayer, as well as in the reference sample without any Mo. It becomes <010> when the Mo interlayer is 0.73 nm thick. The silicide surface and Si/silicide interface are appreciably rougher for the silicides formed with 0.09 nm Mo interlayer, with implanted Mo or in the absence of Mo, than for the silicide formed with 0.73 nm Mo interlayer. The experimental results indicate that the enhanced formation of C54 TiSi2 is caused by the same effect, i.e. template mechanism, irrespective of the means of Mo addition to the Ti-Si system.

The effect of a thin Ta interlayer on the C49 to C54 phase transition of TiSi2 on Si(111) was examined. The Ta interlayered samples were prepared by depositing Ta and Ti films sequentially on Si(111) substrates in a UHV system. As control samples, 100Å Ti films were deposited directly on clean Si(111) substrates. The deposited substrates were annealed for 10 min, in-situ, at temperatures between 500°C and 750°C using 50°C increments. The TiSi2, which formed in this UHV process, was analyzed with XRD, AES, SEM, TEM, and four-point probe measurements. The control samples exhibited the C49 to C54 transition at a temperature of 750°C. However, the TiSi2 samples with 5Å and 10Å Ta interlayers displayed a significant reduction of the phase transition temperature. The XRD analysis indicated that the C49 to C54 transition temperature of TiSi2 was lowered by ∼200°C. The sheet resistance measurement showed a low resistivity characteristic of C54. The SEM and TEM micrographs showed that the Ta interlayer also suppressed the surface agglomeration of the C54 TiSi2 film. The AES analysis data indicated that the composition of the titanium silicide showed the expected Ti:Si stoichiometry of 1:2.

Interfacial reactions of high-temperature sputtered Ti thin films on preamorphized (001)Si have been investigated by high-resolution transmission electron microscopy in conjunction with auto-correlation function analysis. Simultaneous presence of multiphases was found to occur in the amorphous TiSix layer at the Ti/Si interface. The enhanced transformation of C54-TiSi2 in high-temperature deposited samples is attributed to the more extensive presence of silicide crystallites, which serve as nucleation sites, in the a-TiSix layer than that in samples deposited at room temperature.

The scalabilty of the titanium self-aligned silicide (Salicide) process is one of the main issues for sub-quarter micron technologies. The major difficulty is to achieve a low sheet resistance for very narrow polysilicon lines and highly doped S/D regions, without degrading the transistor performance. A preamorphization implant (PAl) performed before the titanium deposition, can achieve a low Ti silicide sheet resistance (<10 Ohms/sq) down to 0.1 Vim gate lengths [1]. Nevertheless, it has been recently reported that PAI should not be sufficient to achieve low silicide sheet resistance for narrower gate widths (< 0.1 µm) [2]. In this work, an extension of the PAI process down to 0.065µm poly-Si lines width, by only using an arsenic implant is presented, achieving a very low sheet resistance value (∼5 Ohms/sq). This result has been obtained by optimizing both the arsenic implant conditions and the silicon surface cleaning. Moreover, a large statistical analysis of the arsenic PAI process impact on 0.25µm device performances has been done, showing that a defectivity of the NMOS Ioff leakage current can appear if preamorphization implant conditions are not optimized.

The interaction and reactivity of Ti and Co with SiO2 and Si3N4 have been investigated. In the case of Ti salicide, SiO2 sidewall spacer showed no lateral silicide overgrowth and low leakage current between gate and source/drain up to silicidation temperature of 750 1C. However, Si3N4 sidewall spacer showed dopant dependence of the lateral silicide growth and leakage current. This discrepancy between SiO2 and Si3N4 and dopant dependence is closely related to the reactivity. For Co, lateral silicide overgrowth is greatly reduced. Instead, Co films on SiO2 and Si3N4 layer were agglomerated by annealing. An annealing at 1050°C caused not only agglomeration of Co film but penetration of Co agglomerates through the layers. Interestingly, the CoSi2 spike of B type epitaxial and twinned orientation was formed in the Si substrate by the penetrated Co source.

During selective chemical vapor deposition (CVD) of titanium disilicide on silicon, consumption of As implanted silicon substrates is enhanced relative to Si substrates implanted with other species. In this study, a selective epitaxially grown Si (SEG Si) layer has been deposited prior to selective CVD of titanium disilicide on samples with different implanted doses of either As or B. If no SEG Si film is deposited, the selective CVD TiSi2 film properties strongly depended on dopant type (As vs. B) and on dopant dose. Addition of a SEG Si film prior to selective CVD TiSi2 improves process stability as a function of changes in initial ion implanted conditions. Use of a SEG Si film prior to selective CVD TiSi2 results in values of TiSi2 thickness and TiSi2 sheet resistance which are approximately constant as a function of initial ion implant dose, and are approximately equal for both the As and B implanted samples used in this study.

We report the first observation of voids in sub-quarter micron Ti-salicided BF2-dopedpolycrystalline silicon (polySi) lines. Some of the voids, with sizes ranging from 10 to 100nm, can be clearly seen on the surface of the TiSi2 film whereas others are situated below the TiSi2 surface. The void density and size increase with decreasing polySi line-width, especially for line-widths < 0.24 µm. The voiding phenomenon was also observed to be moresevere for TiSi2 fabricated with enhanced salicidation techniques such as pre-amorphization-implant(PAl) and implant-through-metal (ITM) as compared to the conventional salicidationmethod without amorphization. The origin of the voids is found to coincide with the fluorinepeak at the TiSi2/polySi interface in the SIMS depth-concentration profiles.

By employing first-principles total-energy calculations we studied the atomic and chemical structure of NiSi2/Si(001) and CoSi2/Si(001) interfaces that are of great importance in understanding electronic properties, such as the Schottky-barrier height, of metal-silicide/silicon junctions. We found a new structural model that is more stable than previously proposed models of interface structures and well explains existing experimental data. The new interface model consists of sevenfold-coordinated interfacial metals and a 2×1 periodic array of interfacial Si dimers, similar to the Si(001) 2×1 surface reconstruction, reducing the number of dangling bonds.

We report experimental findings on the thermal-induced stress-voiding observed during epitaxial CoSi2 formation on patterned Si(100) wafers associated with the Co/Ti-interposing layer scheme [1–6]. The first rapid thermal process (RTP) in a typical SALICIDE process was studied by varying the temperature and the RTP ramp-up rate. Based on ex-situ cross-sectional transmission electron microscopy (XTEM), crystal defects were observed at shallow trench isolation (STI)/Si and gate spacer/Si edges after annealing at temperatures greater than 520°C. In addition, isothermal anneals for various time periods resulted in increased encroachment of an ultra-thin CoSi2-phase at the STI/Si edge. Higher temperature anneals also resulted in a corresponding increase in void size. In addition, higher ramp-up rates led to a thicker CoSi2 “pocket” film at the tensile-stressed STI/Si edge, aligned epitaxially along the {111}-habit planes. Our attempts to bypass the CoSi formation in order to alleviate the anomalous Si diffusion was found to be irrelevant to the voiding issue, due to the inherent nature of this film stack system to nucleate CoSi2 as the first phase. By comparing our experimental observations of voiding with Hu's analysis of the trench isolation stress fields, we found good agreement with the predicted stress field distribution in the active Si and STI/Si edge with the locations of void nucleation. The anomalously large stress induced is still not known, but can be attributed to the encroaching CoSi2 film which tends to realign epitaxially along the STI/Si interface.

A number of modifications of the oxide-mediated epitaxy (OME) technique are presented which have enabled the growth of thick (∼25–40nm) epitaxial CoSi2 layers in a single deposition sequence. The uses of (a) a thin Ti cap, (b) a thin Ti blocking layer, (c) the codeposition of Co-rich CoSix, and (d) the co-deposition of Col−xTix. have all been shown to lead to improved epitaxial quality over the pure Co OME process, for Co thickness greater than 6nm. Essentially uniform, single crystal silicide layers of over 25nm have been grown in a single deposition step. These results are supportive of the proposed role of a diffusion barrier/kinetics retarder on the part of the interlayer in the OME and the Ti-interlayer mediated epitaxy processes.

Low resistivity TiSi2, CoSi2 and NiSi are the three primary candidates for metal contacts in sub-0.25 μ m devices. In the present paper, we review recent progress in the investigations of lowresistivity contacts, which include enhanced formation of C54-TiSi2 on (001)Si by tensile stress, high temperature sputtering, and interposing Mo or TiN layer, improved thermal stability of C54-TiSi2 by the addition of N2 during Ti sputtering or N implantation in (001)Si, self-aligned formation of CoSi2 on the selective epitaxial growth silicon layer on (001)Si, effects of stress on the epitaxial growth of CoSi2 on (001 )Si, improvement of thermal stability of CoSi2 by nitrogen ion implantation or high temperature sputtering, and improvement of thermal stability of NiSi by nitrogen ion implantation or compressive stress.

Oxide Mediated Epitaxy (OME) shows promise as a method to form good quality, thin epitaxial CoSi2 films on most Si surfaces. We have performed an in-situ study of the OME of CoSi2, on the Si (001) surface. Our work was carried out with our specially modified ultra-high vacuum transmission electron microscope (UHV TEM) SHEBA (Surface High Energy Electron Beam Apparatus). With SHEBA we were able to monitor the diffraction pattern and therefore the phase formation throughout the anneal. Our results confirm the suppression of intermediate phases during CoSi2 formation in the OME process. We also see a difference in the as deposited Co film when the oxide coated silicon surface is used rather than a clean substrate. From combined imaging and diffraction studies we will shed some light on the mechanism behind the success of OME.

In this work, we will show that a reactive Ti capping layer can reduce oxide layers that are present at the cobalt-silicon interface. We have used a thin, chemically grown oxide to have a well-controlled form of interfacial oxide layer. To study the silicidation reaction, isochronal annealing was done at various temperatures. Different sets of samples were made in order to investigate the influence of the thickness of the Co layer and its Ti cap. Titanium capping strongly influenced the silicidation reaction. We have found that already at moderate temperatures, Ti can diffuse towards the Co/Si interface, and can reduce the interfacial oxide there present, enabling CoSi2 formation. The CoSi2 thus formed has a preferential epitaxial orientation, and the process by which this epitaxy is attained may be explained by a combination of OME (Oxide Mediated Epitaxy) and TIME (Titanium Mediated Epitaxy).