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Prevention of Corner Voiding in Selective CVD Deposition of Titanium Silicide on SOI Device

Published online by Cambridge University Press:  10 February 2011

Jer-shen Maa
Affiliation:
Sharp Laboratories of America, Camas, WA 98607
Bruce Ulrich
Affiliation:
Sharp Laboratories of America, Camas, WA 98607
Lisa Stecker
Affiliation:
Sharp Laboratories of America, Camas, WA 98607
Greg Stecker
Affiliation:
Sharp Laboratories of America, Camas, WA 98607
Sheng Teng Hsu
Affiliation:
Sharp Laboratories of America, Camas, WA 98607
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Abstract

In the application of selective CVD of titanium silicide to SOI devices, voids were observed at the bottom corner of the spacers, which caused reduction of drain current and in extreme cases formed an open circuit. Test structures were constructed to monitor void formation. It was found the voiding became serious when the thickness of the Si film was reduced. Adjusting the deposition condition by reducing the TiCi4 flow rate or by using a two-step deposition process was able to significantly reduce the chance of void formation. On very thin Si films, voiding can be prevented by depositing a selective Si layer prior to silicide deposition.

Type
Research Article
Copyright
Copyright © Materials Research Society 1999

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