High doses of oxygen were implanted in silicon to produce stoichiometric buried oxide structures. Microstructural analysis was performed using transmission electron microscopy, electron energy loss spectroscopy, and Rutherford backscattering/channeling techniques. Cavities were observed in the top silicon layers of the as-implanted samples in two forms: spherical cavities (30–300 Å in diameter) in the first 1000 Å below the surface, followed by a 500 Å wide lamellar array of elongated cavities. A post implantation annealing was carried out at temperatures between 1150°C and 1250°C for 3 h during which the cavities became faceted and a denuded zone of 400 Å was formed. However, with a 1300°C anneal the cavities disappeared and the density of the two prominent types of defects, namely precipitates (mostly amorphous, but occasionally crystalline) and dislocations, decreased significantly. The silicon-oxide interface became increasingly planar. Possible mechanisms of annealing of the cavities, the precipitates, and the associated planarization of the interface are proposed.

The microstructure of oxygen implanted silicon for use in silicon-on- insulator technology has been examined by transmission electron microscopy. A variety of buried oxide layers prepared using oxygen doses below and above that required for stoichiometric SiO2 formation have been studied. High resolution imaging in crosssection has revealed exceptionally flat Si-SiO2 interfaces, comparable to the best thermally grown Si-SiO2 interfaces. Examination of as-implanted material shows a complex interwoven crystalline/amorphous structure which evolves during high temperature (1350–1400° C) annealing into a buried oxide layer.

Nitrogen implantation into single-crystal silicon can result in a buried nitride layer under proper processing conditions. SOI structures have been formed using this technique. The optimum parameters for forming a buried nitride layer with good insulating characteristics have been investigated. Nitrogen was implanted into <100> silicon at 200 keV at an implantatipp tem erature of 500°C. The effect of implantation doses of 1.05 × 1018N+/cm2, 1.3 × 1018N+/cm+ and 1.4 × 1018N+ /cm+ and post-implantation annealing temperatures of 1050, 1100, 1150, and 1200°C on the buried nitride layer was studied. Transmission Infrared Spectroscopy was used to determine the structure (amorphous or crystalline) of the buried nitride layer. The infrared spectra change as a function of annealing temperature, indicating the transition from amorphous to crystalline silicon nitride. Leakage currents through the structures were measured and SEM micrographs of the nitride surfaces were taken. The correlation between the IR results and these data will be presented.

We have used electron channeling and scanning electron microscopy to study the crystallinity and morphology of epitaxial CaF2 layers on CoSi2 /Si(111) substrates before and after a rapid thermal anneal. The channeling patterns from the layers after a rapid thermal anneal are nearly indistinguishable from patterns from bulk crystals, indicating high crystalline quality. The annealing procedure also improves the film morphology substantially. We have studied the effect of the rapid thermal anneal on the electrical resistivity of the underlying CoSi2 layer. The room temperature resistivity is unaffected by the anneal, but the low temperature behavior of the resistivity indicates a high degree of diffuse surface scattering, in contrast to as-grown films.

A new approach is proposed for the material improvement of silicon-on-sapphire (SOS). This approach utilizes the phenomena that the defect elimination throughout the silicon layer depends on both the deep and shallow self-implantations of the double solid phase epitaxial growth (DSPEG) technique for SOS material improvement. The new aspects of this approach are that the deep implantation does not form an amorphous layer, and therefore the ion damage to the substrate is minimized eliminating Al autodoping of the silicon layer.

Latchup free lateral CMOS transistors with PMOS devices in the laser recrystallized silicon and the NMOS devices in the bulk silicon were fabricated. One micron thick field oxide isolates the PMOS devices in the recrystallized silicon from the NMOS devices in the bulk wafer. The seed area for recrystallization was used for the fabrication of the NMOS devices. An oxide layer of 0.1um thickness was used to protect the channel region of the NMOS devices during the laser recrystallization. The effect of this channel protect-oxide is discussed and the characteristics of the NMOS devices with and without the channel protect oxide are compared.

Limited reaction processing (LRP), a new technique which provides precise control of thermally driven surface reactions, was used to grow multilayer structures composed of semiconductors and insulators. Results are presented for group IV-based materials including epitaxial Si, SiGe alloys, SiO2, and polysilicon. III–V materials such as GaAs, AlGaAs, and InGaAs have also been successfully grown. A number of diagnostic techniques were used to define the advantages and capabilities of LRP, including TEM, SIMS and AES. In addition, some preliminary device results are presented.

Growth kinetics of silicon dioxide films grown by rapid thermal processing on polysilicon and single crystal silicon films is described. Oxides were grown in pure oxygen and oxygen with up to 4% HCI. For process time in the 1 to 120 s, oxide films thicknesses in the 2 to 36 nm are obtained with a uniformity of ±2% across 100 mm wafers. These oxides show an interface density of states of 5×109 eV−1cm−2 after a 30 s post-oxidation anneal in nitrogen ambient at 1050 C.

The effect of Rapid Thermal Annealing on phase formation and diffusion processes in the Ni(30 nm) /Al(10 nm)/Si system was studied and coxpared to a Ni(30 nm)/Si reference system. Heat treatments were carried out at temperatures between 400°C and 900°C for 2 seconds.

The results obtained by means of TEM, AES and XRD indicated that the Ni/Al/Si system underwent a local melting in the intermediate Al layer at the Al/Si eutectic temperature (577°C). This reaction, due to the rapid melting process, resulted in formation of a unique layered-structure composed of a columnar polycrystalline layer (60 nm thick) of Ni2Si and NiSi adjacent to the Si substrate with relatively smooth interface and an outer layer of two separate polycrystalline films (both about 10 m thick) of Al3Ni (inside) and Ni(Al0.5Si0.5 ) (outside). Under the same rapid thermal processing conditions the Ni/Si reference system underwent a solid state reaction which resulted in the formation of a polycrystalline layer (60 nm thick) composed of Ni2Si and NiSi as well as NiSi2.

The epitaxial growth of near noble silicides, including CoSi2, NiSi2, FeSi2, Pd2 Si, and PtSi on (111)Si, by rapid thermal annealing was studied by transmission electron microscopy. Single-crystalline CoSi2 was formed on (111)Si in the solid phase epitaxy regime by a non-ultra-high vacuum method. The effect on gas ambient was found to be of critical importance on the growth of single-crystal CoSi2 on (111)Si. The best NiSi2, FeSi2, Pd2 Si, and PtSi epitaxy grown on (111)Si by rapid thermal annealing were found to be of comparable quality to those grown by conventional furnace annealing.

As* ion beam irradiation of thin titanium (∼300Å) films deposited on silicon substrates at sufficiently high dose and energy has been shown to induce an athermal thin film reaction (as evidenced by insenstivity of the reaction to irradiation current) leading to the formation of a homogeneous titanium subsilicide phase with an extremely smooth interface to the underlying silicon. RBS indicates a stoichiometry of Ti3Si4 for this silicide phase. Subsequent rapid thermal annealing (RTA) of this silicide results in the incorporation of additional silicon leading ultimately to the formation of the stable C-54 TiSi2 phase. Silicided junctions fabricated using a ion beam irradiation show improved sheet resistance uniformity and leakage characteristics when compared with those fabricated using the conventional RTA salicide process.

The reaction rate of sputter deposited Ti films on c-Si as a function of process ambient was studied. Sintering temperatures ranging from 600 to 1100° C, under pure ammonia, forming gas, nitrogen and argon were used. The additional effect of a reactively sputtered TiN cap on the reaction rate was also investigated. Processed films were then analyzed using AES, RBS and four point probe resistivity mapping. It was found that for temperatures below 700° C, an ammonia ambient has the most pronounced effect on reducing the rate of formation of titanium silicide, followed by forming gas (N 2/H2 10% vol), nitrogen and argon. Additionally, the presence of the TiN cap further reduced the reaction rate while exhibiting significant diffusion of nitrogen into the silicide film. For the samples annealed in ambients containing nitrogen, a thin layer of Tix Ny was simultaneously formed on top of the silicide film. The thickness and Stoichiometry of this titanium nitride films were then correlated with the sintering temperature and ambient. The details of these findings and their impact on the formation of the self-aligned titanium silicide (salicide) will be presented.

Thin films of tungsten silicide with resistivities of 30 – 35 μΩ-cm have been formed by sputter depositing 71 nm of W metal onto (100) oriented, 5 Ω-cm, p-type silicon wafers that were etched in BOE 500 solution. The samples were fast radiatively processed in an RTA system under high vacuum for time anneals ranging from 15 – 50 seconds at a temperature of ∼ 1100°C. The inevitable oxide barrier at the interface is shown to decrease with increasing RTA time.

One requirement of self-aligned microelectronics metallization processes is selectivity of reactions, e.g., a deposited, thin metal film must react with Si to form a silicide, yet avoid reaction with SiO2 Rapid thermal processing (RTP) techniques may enhance selectivity by utiliz-ing differences in competing reaction kinetics. In this paper, we apply the RTP/transmission electron microscopy (RTP/TEM) technique to determine processing temperature (T)/time (t) “win-dows” for selective sulicide formation in Ti-Si vs Ti-SiO2 reactions. Free-lying Si/Ti/Si and SiO2/Ti/SiO2 films deposited on electron microscope grids were RTP'd in pairs and immediately examined by TEM. The products of the interfacial reactions, their sequence of appearance, and the T/t conditions for silicide nucleation and growth in each system are described.

A ternary compound results from the fast radiative processing of Ni/Ti bilayers on Si<100> substrates. In the Ti-Ni-Si system, Ni is the dominant moving specie at low temperatures while Si starts to diffuse at 575°C. For bilayers with Ti in excess, the final product,above 750°C, is a mixture of ternary compound and TiSi2 whereas excess Ni leads to a layer of NiSi between the substrate and the ternary layer, at tempera-tures below 700° C.

A technique is described for direct measurement of evaporation of Ga and As from capped GaAs during RTP. Application of this method to the study of Si, SiO2, and Si3N4 caps with thicknesses of 20 nm to 60 nm provides a direct measure of the temperature ranges for which the caps are able to prevent evaporation during RTP. In addition, kinetic studies of the evaporation at slightly higher temperatures provides information useful for establishing the predominant evaporation mechanism. For the encapsulants studied, these measurements indicate that the observed evaporation is due to formation of cracks in the film during the initial 10 sec of RTP.

The annealing behaviour of electrically-active defects in-duced in virgin n-type silicon by-Nd-Yag Laser (1.6 J cm−2,0.53 μm) irradiation has been investigated with Deep Level Transient Spectroscopy (DLTS). The observed defects : E(0.32 eV), E(0.45 eV) and E(0.53 eV) are characteristic of laser treated silicon, and have been reported by a number of workers. Using a rapid thermal furnace at 600°C for durations between 10 and 60s, we have observed a linear decrease in the concentration of these defects, and for times T > 60s, they are seen to disappear. A similar result was obtained in studies carried out on both vir-gin and implanted p-type silicon. This is in sharp contrast to the classical furnace annealing which requires much longer du-rations (20–30 min) at the same temperature (600 °C) in order to obtain the same results. A study of the annealing kinetics for the E(0.32 eV ;σn = 8 × 10−16 cm−2) level between 500 and 650°C in steps of 50°C for the two processes confirms this tendency for all processing temperatures, and shows a difference in ac-tivation energy of practically the same order of magnitude as the ionization energy of the defect (i.e. = 0.31 eV). Induced defects in high temperature > 1000°C in rapid thermal processed (RTA) n-type Si, also annealed out after a further 600°650 °C, 60 s RTA treatment. These results suggest that defect annealing is not a purely thermal mechanism, and lend strong support to the idea of an ionization induced enhancement.

Defect state generation in either virgin or implanted CZ silicon has been investigated by means of capacitance transient spectroscopy (DLTS) after rapid thermal annealing (RTA), using an incoherent light furnace and variable cycle parameters. No electron traps were dectected with gold Schottky contacts made on virgin phosporous-doped silicon annealed for 5 sec at any temperature. On the otherhand 3 hole trap levels H1(0.45 eV), H2(0.29 eV) and H3(0.31 eV) have been observed in boron-doped silicon (Al Schottky contacts) after a 5 sec temperature plateau between 850 and 1050°C. Peak concentrations ranging from 1013 to 1014 cm−3 were measured after annealing at 1000°C for the three hole traps. By increasing the plateau duration up to 20 sec hole traps were no longer detected in boron-doped silicon. Furthermore in As+ or PF5+-implanted and rapidly annealed N+/P junctions the H3(0.31 eV) level was replaced by another hole trap H4(0.4 eV), which appeared within specific conditions (RTA parameters, implant dose and species). Moreover an electron trap E(0.55 eV) was only detected in the high dose As+-implanted junctions after annealing for 10 sec at 1100°C. The probable metallic origin of the observed defect states and the RTA parameter dependence of the hole trap concentrations suggest gettering and trapping in interstitial sites as possible mechanisms involved in RTA.

The segregation of 6 Mev S-implanted Si during RTA between 700 and 1200 °C has been closely studied. A model has been proposed in which self-interstitial atoms induce S to segregate into the bulk Si at ∼700°C and vacancies induce S to segregate towards the implanted surface at the higher temperatures. The binding energy between the SIA and S has been measured to be ∼0.5 eV.

Preamorphization by indium of boron implanted silicon layers has been studied as a means of reducing defects in the annealed and activated shallow junctions. The In preamorphized samples after RTP annealing at 950 to 1150°C show an absence of spanning dislocations. A 5 sec. anneal at 1100 °C results in the complete annihilation of residual dislocation loops at the original crystalline/amorphous (c/a) interface. The minimum dose to preamorphize Si with 200keV In was 5×1013/cm2. During annealing the In was found to localize at two peaks, one at the original c/a interface and the other closer to the surface, where In precipitation was observed.