A review is given of the requirements on MBE-grown layers as far as processing is concerned. Aspects that are considered are: defect density, particulates, background doping and metallic contamination. The stability of the grown layers against thermal anneals is considered. It is shown that normal thermal diffusion in HBT structures is not important, other effects, like transient diffusion following ion implantation, have drastic effects on the grown profiles. As an example the processing of mesa-isolated heterojunction bipolar transistors is treated. It is shown that all-Si transistors can be grown with ideal Gummel plots. The Gummel plots of SiGe HBTs show small non-idealities. The current gain enhancement of the HBTs with respect to the all-Si transistors is shown to be as large as 200 times. Due to transient diffusion, parasitic barriers are formed, that have a detrimental effect on the AC and DC performance.

A basic process sequence for low temperature in-situ processing of metal-insulator-semiconductor (MIS) structures in an ultra-high vacuum (UHV) multichamber system is presented. It includes conditioning of the process chamber by plasma heating, in-situ cleaning of silicon wafers, and conventional silicon molecular beam epitaxy (Si-MBE). The in-situ cleaning is achieved by an argon/hydrogen plasma treatment of the wafer surface at temperatures well below 400° C. The native oxide as well as carbon compounds are removed from the silicon surface. Etch rates for SiO2 are determined for various plasma parameters. Without additional cleaning procedures, silicon films are deposited in another process step using a quadrupole mass spectrometer controlled electron beam evaporator. Epitaxial films are obtained for substrate temperatures as low as 500°C on (100) and 600°C on (111) silicon for deposition rates of 0.05 nm/s.

Wet chemical and in situ hydrogen plasma cleaning processes were studied and a low temperature cleaning process was developed for Si (100), Ge (100) and SixGe1−x (100) surfaces. A uv-ozone and HF based spin etch were used to initially remove contaminants and oxides from the Si (100) and SixGe1−x (100) surfaces. The Ge (100) surfaces were treated with deionized water prior to entry to UHV. Residual gas analysis (RGA) was used in the investigation of the surface removal process of the in situ H-plasma cleaning. Low Energy Electron Diffraction (LEED) and angle resolved UV-Photoemission Spectroscopy (ARUPS) were used to examine the surface structure and electronic states. The 2×1 LEED patterns were obtained for Si (100), Ge (100) and SixGe1−x (100) after cleaning at a maximum processing temperature of 300°C. By varying process conditions, the LEED showed the 1×1 and 2×1 surface diffraction patterns. The ARUPS spectra showed the electronic states and the chemistry of the cleaned surfaces.

A novel epitaxial growth method for fabricating mesa patterns on a micrometer scale has been investigated. Electrical devices have been prepared employing this technique and their characteristics are in good agreement with those of mesa etched devices.

We investigated the initial oxidation of MBE-grown Si (100) surfaces with atomic flatness using x-ray photoemission spectroscopy (XPS) and reflection high energy electron diffraction (RHEED). It was found that the MBE-grown surfaces are inert and hardly oxidized even after exposure to molecular oxygen up to 1500 Langmuir (L) at room temperature. At elevated temperatures, the surface oxidation was substantially promoted. On the contrary, the surface oxidation was found to be substantiated on a deliberately corrugated Si surface prepared by low temperature MBE growth, even at room temperature.

Si columnar structures were fabricated using Si MBE on Si substrates with column sizes in the order of ∼ 100 Å. The objective is to explore a viable approach to fabricate quantum wire structures. The growth of the structures, which was due to the growth instability, was an excellent example of a self-limiting process. The dependence of column morphology on the critical parameters, e.g., Si molecular beam incident angle, substrate temperature, substrate rotation, speed, etc., were demonstrated. Comparison between the experimental and the computer simulation results demonstrated the importance of the latent heat related atom migration as compared to the normal surface diffusion at low substrate temperatures and several A/s beam fluxes. A substrate temperature window (≈125°C) was observed which allowed the fabrication of crystalline micro-columns on Si (100) substrates. RHEED studies indicated that the crystalline micro- columns were heavily twined. The twinning phenomenon was also observed in the computer simulation results and interpreted as a result of the reduction in twin formation energy due to the extremely small dimension of the columns. Thermal stability of the columnar structures is discussed. Finally, photoluminescence studies and some potential applications are also discussed.

A Light Oscillation Control Unit System (LOCUS) has been developed for the purpose of monitoring Reflexion High Energy Electron Diffraction (RHEED) oscillations and to use the oscillations to control the crystal growth with single atomic layer resolution. The system can be used for phase-locked epitaxy, i.e., shutters controlling the growth are actuated when monolayers are completed. To reduce the usual damping of the RHEED-oscillations, the system can also use the method of synchronization of nucleation, i.e., periodically varying the surface supersaturation by changing the substrate surface temperature during each oscillation. Four shutters can be operated automatically and the superlattice composition can be chosen in a number of different ways. LOCUS gives fast response on intensity oscillation maxima and minima beyond a programmable discrimination level. Relevant crystal growth parameters can be changed during the run of the program, which implies that even quasi-periodic superlattices can be grown. There is also a possibility to switch from automatic to manual control. The shutters and substrate heater have been designed to reduce the influence of shifts of the diffraction pattern as the growth conditions are changed.

A dedicated, grower-friendly MBE computer control system is described, and its performance in demonstrated in growth of high resolution doped SiGe structures.

This paper reviews the diverse methods used to achieve doping during MBE of Si and SiGe, and the incorporation processes involved. The optimum choice of dopant and methodology depends on the most appropriate growth conditions for a given structure. At growth temperatures exceeding 750°C, Potential Enhanced n-type doping of coevaporated Sb is capable of achieving high resolution structures, at doping levels up to mid-1019 cm−3. At lower temperatures, such as those most suited to SiGe growth, Sb-doping becomes a formidable challenge, due to the high accumulated equilibrium coverages required. Low energy ion implantation appears to be the favoured route for good control, p-type B-doping can readily be achieved by coevaporation of compounds or, to avoid oxygen incorporation at low temperatures, the element. A “designer” chart for B-doping of Si is presented.

Delta doping in MBE has attracted considerable attention since its inception in 1980 [1], as a vehicle for studies of 2D phenomena and for its potential applications in, for example, FET devices [2] and I.R. detectors [3]. Boron delta doping in silicon is a recent development [4]. In previous papers we have reported on the growth, TEM, CV profiling, SIMS profiling and XRD characterisation of B delta layers [4,5,6]. It is of interest to know if the present growth method [4] produces a dopant sheet a monolayer wide or, in any event, what is the true width. Previous techniques [4,5,6] have yielded values between 0.4nm and 3nm for the width. Schottky barrier tunnelling spectroscopy provides further information on this question, but is also of interest for a study of the electronic structure of the delta layer. It has been used previously for a study of delta doping in III-V materials [7] and also for Sb delta doping in Si [8,9], but there have so far been no reports of its application to Si:B delta layers.

The performance of many Si/SiGe devices, particularly those involving modulation doped quantum wells, will depend on the quality of the matrix and doping interfaces involved. These may be adversely affected by profile smearing of Ge and the dopant. A study of boron incorporation in SiGe, as a function of substrate temperature and Ge fraction, shows a marked difference in profile smearing for boron in Si and in the SiGe alloy. This is shown to be associated with a reduction in the temperature for transition from equilibrium to kinetically limited accumulation in the alloy.

Strong hole intersubband infrared absorption in δ-doped Si multiple quantum wells is observed. The structures consist of 10 periods of boron doped Si quantum wells and undoped Si barriers. Near 100 % infrared absorption is measured by FTIR spectrometer using waveguide structures. Absorption peaks ranging between 3–7 μm are measured, and these peaks can be tuned by varying the doping concentration in the δ-doped layer. Polarization dependence has been verified to agree with the intersubband selection rule. The estimated peak energy positions using a self-consistency calculation are considerably lower than experimental values, probably due to a large exchange energy of many body effects. This observation suggests multiple quantum well IR detectors using Si- technology.

Dopant incorporation and surface segregation are studied for thermal Sb and Al cases. The values of the incorporation probability and the segregation ratio have been mainly determine by SIMS measurements. The doping kinetics is discussed using a multi-site model including high dopant surface coverage effects. The calculated results were in good agreement with experimental data.

Silicon layers grown by molecular beam epitaxy, using both direct resistive heating and indirect radiant heating of the substrate, have been evaluated by photoluminescence measurements, diode I-V characterization, and chemical etching tests. The results show that large densities of defects could be introduced when resistively heated substrates were experiencing thermo-mechanical stress. Films with good crystal quality were grown using a carefully designed radiant type heater.

A high temperature, elemental boron evaporation source has been used for the study of the boron doping behaviour in Si as a function of growth temperature and doping level. Significant profile smearing of boron at doping levels below 5×1018cm−3 is observed. Profile smearing is more severe in higher doped samples for growth temperatures above 600°C at a growth rate of 0.28 nms−1. This is interpreted as arising from the formation of a surface phase of boron at higher doping levels. The marked improvement in profile abruptness at low temperatures suggests significant benefits associated with the use of an elemental boron source for the growth of high resolution Si/Si1−xGex device structures.

Boron doping, using an elemental boron source during molecular beam epitaxial growth of silicon, has been studied. The boron flux was provided by a high temperature source heated by radiation and electron bombardment. The maximum boron deposition rate used was 1×1012 cm−2 s−1 at an estimated B temperature of 1950 °C. For growth at a substrate temperature of 650 °C, there is very little surface segregation when the doping level is in the range 1×1016-1×1019 cm−3. For very high boron to silicon flux ratio (>7×10−3) there is a strong surface segregation that results in surface accumulation of boron. This initially leads to a 2×2 reconstruction of the Si (100) surface, and further surface segregation during growth results in roughening of the surface due to the creation of (311)-facets. In a separate set of experiments, the surface segregation was studied using in situ Auger electron spectroscopy of predeposited layers of boron that were gradually covered by Si capping layers. Strong and surface coverage dependent surface segregation was observed both in the case of Si (100) and (111) substrates.

We demonstrate the growth, by MBE, of high sheet density B delta layers in both Si and SiGe epitaxial layers. Double Crystal X-Ray Diffraction is shown to be a non-destructive method of characterising the width of very narrow (0.3 nm) delta layers and the sheet density of the activated B. The ability of delta layers to withstand high temperature anneals is considered and it is found that a 750 °C anneal for 1 hour broadens the delta layer to beyond the width required for carrier confinement.

We have investigated p-type doping of Si and SiGc layers in M BE by using two different boron sources. One is a SiB alloy which is prepared in situ by melting elemental boron into Si. Typical B concentrations in the source material are a few percent. Doping levels within 1×1018 cm−3 and 5.5×1019 cm−3 can be adjusted within the temperature range of 350°C to 850°C. No indication of segregation or memory effects is found. The activation is between 90 and 100%. The second p-type doping source investigated is a diborane (B2H6) gas source. Diborane provides doping capability in the range between 1016. to 1020. The incorporation efficiency at 550°C is about 2×10'3. It depends on the diborane exposure and the substrate temperature. The activation at 550°C is above 90%. For lower growth temperatures the activation is considerably reduced. The problem of memory effects is discussed.

A theoretical study of alloy clustering in an hypothetical diamond cubic alloy, 00.560.5 in which thermodynamics favors phase separation is performed based on a master equation approach. The a-b atom pair interaction is assumed weaker and repulsive (-0.25 eV). It is shown that below 375°C, due to negligible surface migration, there is no clustering of the alloy, but, the surface roughness is very large. In the intermediate temperature range of 300 – 625°C, with increasing temperature, surface migration increases, resulting in more clustering and decreased surface roughness. Above 500°C, due to very high surface migration, complete phase separation and smooth surface result. It is shown that the conventional MBE growth techniques are incompatible with the growth of good quality heterostructures which consist of alloys having large poistive enthalpy of mixing.

Optimization of growth parameters of short period Si/Ge superlattices (SLs) has been achieved via in situ low-energy electron diffraction (LEED) and Auger electron spectroscopy (AES) measurements during homo- and heteroepitaxy on Si (001) and Ge (001) substrates. Transmission electron microscopy (TEM) reveals that pseudomorphic SimGe12-m (m = 9 and 3 for growth on Si and Ge, respectively) SLs with extended planar layering can be prepared almost defect-free by a modified molecular beam epitaxy (MBE) technique. Whereas the SLs on Ge can be deposited at a constant substrate temperature, high-quality growth on Si demands for temperature variations of more than 100°C within one superlattice period. Strain relaxation of these SLs with increasing number of periods has been directly compared by means of TEM. For the compressively strained structures grown on Si we found misfit dislocations of the type 60° (a/2)<110>. Under opposite strain conditions i.e. for growth on Ge, strain relief occurs only by microtwin formation through successive glide of 90° (a/6)<211> Shockley partial dislocations. This is consistent with a calculation of the activation energy for both cases based on a homogeneous dislocation nucleation model.