Sheet resistance (Rs) reductions are presented for antimony and arsenic doped layers produced in strained Si. Results re-emphasise the Rs reduction for As comes purely as a result of mobility improvement whereas for Sb, a superior lowering is observed from improvements in both mobility and activation. For the first time, strain is shown to enhance the activation of dopant atoms whilst Sb is seen to create stable ultra-shallow junctions. Our results propose Sb as a viable alternative to As for the creation of highly activated, low resistance ultra-shallow junctions for use with strain-engineered CMOS devices.

Comparison of state-of-the-art zero-penetration sheet resistance tools on ultra-shallow Boron CVD layers on top of a medium doped As layer.

Implementation of millisecond annealing requires the identification of the operating conditions for that technique which minimize the residual defects. In addition, possible combinations of low temperature annealing with millisecond annealing could result in minimal residual defects. The samples studied here were implanted with Ge+ pre-amorphization and boron dopant ions and were activated with a scanning laser annealing technique with maximum temperature dwell times of about one millisecond. The laser anneal conditions were varied, along with combinations of spike anneals. The annealed samples were analyzed by plan-view transmission electron microscopy (TEM) to measure the residual defect density and size. The effects of spike temperature, laser annealing temperature, and scan rate will be discussed.

Boron diffusion and defect evolution during sub-millisecond (ms) laser annealing with partial SPER are investigated using secondary ion mass spectrometry and transmission electron microscopy. Boron diffusivity enhancement in amorphous-Si is observed during partial SPER at 550 °C. It is shown that boron diffusion during the laser annealing process is a 2-step diffusion (SPER + Laser). The depth of the amorphous layer affects the dopant activation behavior. During sub-ms laser annealing, end-of-range defects are formed and show an evolution behavior. {311} defects cannot completely transfer to dislocation loops after 1300 °C laser annealing. It is considered that the thermal budget of sub-ms laser is too small for full defect evolution. Atomistic diffusion modeling using a kinetic Monte Carlo method can explain the defect behavior during laser annealing.

The permanent decrease of the transistor size to improve the performances of integrated circuits must be accompanied by a permanent decrease of the depth of the source-drain junctions. At the same time, in order to keep acceptable sheet resistance values, the dopant concentration in the source-drain areas has to be continuously increased. A possible technological way to meet the junction depth and abruptness requirements is to use co-implantation of non doping species with classical implantations, especially for light ions as B or P.

In order to clarify the complex interactions occurring during these co-implantation processes, we have performed an extensive experimental study of the effect of Ge, F, N, C and their combinations on boron. A special interest was given to the overall integration issues. We will show that it is required to optimize the respective locations of co-implanted species with respect to the B profiles (more precisely the ion implantation damage locations), as well as the co-implanted species doses, to get an acceptable compromise between the efficient diffusion decrease required for the junction abruptness and depth, and a reasonable current leakages.

In this paper we report on the quantification of Ge diffusion in strained Si/SiGe (s-Si/SiGe) structures for different Ge content in the SiGe virtual substrate. Using TCAD tools, the diffusivity has been calculated by varying pre-exponential factor and activation energy for Ge diffusion in s-Si and SiGe layers separately and obtaining a fit to the SIMS profiles. We observe an exponential and a linear dependence of pre-factor and activation energy for Ge diffusion in s-Si and SiGe, respectively, which is in agreement with literature. As a result of diffusion, the carrier confinement in thin strained layer reduces and the mobility is affected. Using C-V measurements on MOS capacitors fabricated along with devices, a shift in the flat band voltage has been observed and is attributed to a change in the interface trapped and fixed oxide charge. We observe a stronger effect of the variation of strained layer thickness than Ge content on the change in the flatband voltage. This observation is consistent with an exponential increase in Ge arriving at the interface with decrease in strained layer thickness.

Preamorphization implant (PAI) prior to dopant implantation, followed by solid phase epitaxial regrowth (SPER) is of great interest due to its ability to form highly-activated ultra-shallow junctions. Coupled with growing interest in the use of silicon-on-insulator (SOI) wafers, modeling and simulating the influence of SOI structure on damage evolution and ultra-shallow junction formation is required. In this work, we use a kinetic Monte Carlo (kMC) simulator to model the different mechanisms involved in the process of ultra-shallow junction formation, including amorphization, recrystallization, defect interaction and evolution, as well as dopant-defect interaction in both bulk silicon and SOI. Simulation results of dopant concentration profiles and dopant activation are in good agreement with experimental data and can provide important insight for optimizing the process in bulk silicon and SOI.

Formation of highly activated, ultra-shallow and abrupt profiles is a key requirement for the next generations of CMOS devices, particularly for source-drain extensions. For p-type dopant implants (boron), a promising method of increasing junction abruptness is to use Ge preamorphizing implants prior to ultra-low energy B implantation and solid-phase epitaxy regrowth to re-crystallize the amorphous Si. However, for future technology nodes, new issues arise when bulk silicon is supplanted by silicon-on-insulator (SOI). Previous results have shown that the buried Si/SiO2 interface can improve dopant activation, but the effect depends on the detailed preamorphization conditions and further optimization is required. In this paper a range of B doses and Ge energies have been chosen in order to situate the end-of-range (EOR) defect band at various distances from the back interface of the active silicon film (the interface with the buried oxide), in order to explore and optimize further the effect of the interface on dopant behavior. Electrical and structural properties were measured by Hall Effect and SIMS techniques. The results show that the boron deactivates less in SOI material than in bulk silicon, and crucially, that the effect increases as the distance from the EOR defect band to the back interface is decreased. For the closest distances, an increase in junction steepness is also observed, even though the B is located close to the top surface, and thus far from the back interface. The position of the EOR defect band shows the strongest influence for lower B doses.

A flash lamp has been proposed for annealing wafers with diameters approaching 100 mm. The equipment applies a pulse, with duration 0.5 ms to 20 ms, resulting in large transient thermal gradients in the wafer. In this paper, we present a model for the thermal reaction of this process and its effect upon the mechanical behaviour, in order to predict stresses, shape changes and to capture practical phenomenon, such as bifurcation of deformation modes. We then use the model to follow changes in the expected response consequent on altering process conditions, as well as exploring important issues associated with scaling to large wafer sizes. The model is further used to predict material yielding leading to permanent deformations. This work presents the first description of the thermo-mechanical response of wafers to flash lamp annealing in the millisecond time regime and is therefore fundamental to the use of this technique in the fabrication of semiconductor devices.

Within this paper we have demonstrated the unique capability of scanning spreading resistance microscopy (SSRM) in order to evaluate and optimize the recent approaches towards the formation of advanced p-MOS devices. As shown in this paper, such an optimization requires a detailed 2D-analysis on completely processed devices as two-dimensional interactions may cause (unexpected) lateral diffusion and (de) activation of underlying profiles. Emphasis will be on junction formation using Ge- pre-amorphization and carbon based cocktail implantation coupled with activation based on solid phase epitaxial regrowth and/or millisecond laser anneal. In the case of a Ge-pre-amorphization implant followed by solid phase epitaxial regrowth, SSRM shows an obvious relationship between the presence of defects in the end of range region and halo implant de-activation. Based on the quantified 2D-profiles we can extract the lateral and vertical junction depths as well as the lateral and vertical abruptness of the extension region. A drastic reduction of the lateral diffusion for the cocktail implant versus the standard reference devices with classical spike annealing is eminent. At the same an important reduction of the lateral diffusion of the source/drain implants (HDD) under the spacer can be seen. The SSRM results also highlight the impact of different activation mechanisms on the channel implants (in particular on the shape of the halo pockets).

As extensions have been up till now always used in N-MOS transistors with an activation anneal. Here, we show that also alternative doping by P can result in junction extensions that are extremely abrupt and shallow thus suitable for upcoming transistor technologies. P extensions are manufactured by amorphization, carbon co-implantation and conventional rapid thermal annealing (RTA). The impact of Si interstitials (Sii) flux suppression on the formation of P junction extensions during RTA is demonstrated. We have concluded that optimization of implants followed by RTA spike offers excellent extensions with depth Xj = 20 nm (taken at 5 × 1018 at./cm3), abruptness 3 nm/dec. and Rs = 326 Ω. Successful implementation of these junctions is straightforward for N-MOS devices with 30 nm gate length and results in an improved short channel effects with respect to the As reference.

The challenge of achieving maximal dopant activation with minimal diffusion has re-awakened interest in millisecond-duration annealing processes, almost two decades after the initial research in this field. Millisecond annealing with pulsed flash-lamps or scanned energy beams can create very shallow and abrupt junctions with high concentrations of electrically active carriers, but solutions for volume manufacturing must also meet formidable process control requirements and economic metrics. The repeatability and uniformity of the temperature cycle is the key for viable manufacturing technology, and the lessons from the development of commercial rapid thermal processing (RTP) tools are especially relevant. Advances in the process capability require a fuller understanding of the trade-off between dopant activation, defect annealing. diffusion and deactivation phenomena. There is a strong need for a significant expansion of materials science research into the fundamental physical processes that occur at the short time scales and high temperatures provided by millisecond annealing.

We study B diffusion in the presence of Ge by using a first principles density functional theory calculation. We investigate the relative stability and migration barriers of Si and Ge interstitials as well as binding energy and diffusion pathway of Boron-Interstitial (BI) pair comprised of Boron and Si or Ge interstitials. We find that Ge interstitials are more stable but less mobile compared to Si interstitials, leading to higher population of interstitials in the implanted Si1-xGex. However, BI pair comprised of Ge interstitial and Boron is less stable compared to Si interstitial –Boron pair and migration barrier of BI pair in presence of Ge is increased, leading to less TED.

Several aspects of the integration of diffusion-less junctions in a NMOS and PMOS conventional flows are evaluated. Processes as Solid Phase Epitaxial Regrowth (SPER) or advanced annealing techniques, as flash or laser, demonstrates benefits not only on the 1D junction profiles but also on the transistor characteristics. An optimization of the implants and of the annealing conditions lead to improved or equivalent transistors performance and short channel effects control compared to the conventional spike RTA process. A significant gain in the overlap capacitance could allow for reduced CV/I. Furthermore the junction leakage can be lowered down to the values reached with the conventional spike RTA process.

This work demonstrates the efficiency of a Germanium and Carbon co-implantation that suppresses the Boron Transient Enhanced Diffusion, enhances Boron activation and enables large improvement of Short Channel Effects in PMOS devices while maintaining drive current performances. We present here 65/45nm node devices on conventional bulk substrates featuring Germanium and Carbon engineered shallow junctions that enable to reduce the Drain Induced Barrier Lowering compared to devices implanted only with Boron. This improvement is attributed to the suppression of Boron channelling with Ge pre-amorphization (PAI), and to the reduction of Boron TED due to the trapping of interstitial defects by Carbon with Germanium PAI.

The advantages of fluorine co-implantation on reducing the deep P junction profile is investigated and commented as a possible valuable solution for further scaling of the NMOS transistors spacer length. On PMOS transistors, Ge+C+B cocktail junctions lead to improved short channel effects control, S/D resistance and performance over the conventional approaches. Additional laser annealing induces a partial dissolution of the doping clusters in the junction and lower the S/D transistors resistance. A performance improvement is demonstrated both for NMOS and PMOS with cocktail junctions activated by spike RTA and additional laser annealing.

The use of silicon substrate preamorphization in ultrashallow junction formation has increased in recent years. The reduction of channeling during impurity implantation, coupled with higher-than-equilibrium metastable solubility levels, produces scaled junctions with low resistances. However, a number of physical phenomena arise that must be considered for proper impurity profile and device optimization.

With respect to impurity solubility advanced annealing techniques such as solid-phase-epitaxial-regrowth (SPER), flash, and laser annealing, can place impurity atoms on substitutional sites in the silicon lattice to extremely high concentrations when combined with preamorphization. In this context there is a relationship between the equilibrium distribution coefficient and metastable solubility. The long-established equilibrium distribution coefficient of an impurity, extracted in the liquid to solid phase transformation, can make a prediction of metastable solubility after transformation of amorphous silicon into crystalline silicon during SPER, flash, and laser annealing.

With respect to impurity redistribution the significant effects can be split into 3 categories, namely before, during, and after recrystallization. Before recrystallization impurity diffusion in the amorphous region may occur. Boron is particularly susceptible to this effect, which is very significant for the formation of p-type junctions. During recrystallization many impurities move ahead of the amorphous-crystalline (a/c) interface and relocate closer to the surface. In general redistribution is more likely at high impurity concentrations. For low-temperature SPER there is a direct correlation between the magnitude of this redistribution effect and the impurity metastable solubility. After recrystallization, with SPER, flash, and laser annealing commonly leaving residual damage in the silicon substrate, interstitial-diffusers are especially vulnerable to preferential diffusion toward the surface, where impurity atoms may be trapped, ultimately leading to a more shallow profile.

Ultra-high temperature annealing is emerging as a promising technique for annealing ion implanted layers with a view to maximizing electrical activation while minimizing dopant diffusion. In order to ensure successful implementation, several materials-related problems have been under study. Since the time scale of the process is short, diffusion in the amorphous phase may dominate the final profile. In general, the residual disorder after anneal can be higher than with current anneal processes. However, the short time scale of the process curtails the opportunity for movement of dislocations into regions where the electrical behavior of a device would be affected. An additional effect of the limited time scale is the ability of silicon to plasto-elastically support the high strain-rates that may arise during the anneal.

We have investigated MSA, namely, Laser Spike Annealing (LSA) and Flash Lamp Annealing (FLA), dopant activation technology of source/drain extension for 45 nm node, which can be substituted for spike RTA. Since it is possible to achieve a similar relation between a sheet resistance and a junction depth by using either FLA or LSA, both annealing methods are capable of providing the junction characteristics required by the ITRS target. However, we have noticed that there are three crucial issues from the viewpoints of device integration and CMOSFET performance: junction leakage current, gate leakage current and pattern dependence. In this report, we discuss these issues and indicate how to cope with them.

Ultrashallow junctions (USJ) were created by tilted 5 keV As+ implantation to a dose of 3x1015 cm−2 followed by excimer laser annealing (ELA). Sheet resistance and capacitances were measured in the background layer below the USJ. Results showed that sheet resistance was dependent on the laser energies in the close vicinity of these diodes. Doping profiles extracted from the capacitances indicated electrical deactivation here caused by the residual implantation defects. The extent and location of the residual damage is shown to be strongly dependent on the implantation dose and tilt angles, and also influenced by the laser annealing.