Hostname: page-component-586b7cd67f-dlnhk Total loading time: 0 Render date: 2024-11-23T15:03:05.021Z Has data issue: false hasContentIssue false
  • English
  • Français

Integration of Solid Phase Epitaxial Re-Growth, Flash and Sub-Melt Laser Annealing for S/D Junctions in CMOS Digital Technology

Published online by Cambridge University Press:  01 February 2011

Simone Severi ,
Emmanuel Augendre  and
Kristin De Meyer
Simone Severi
Affiliation:
[email protected], IMEC, SPDT, Kapeldreef 75, Leuven, Belgium, 3001, Belgium, 003216283579
Emmanuel Augendre
Affiliation:
[email protected], IMEC, SPDT, Kapeldreef 75, Leuven, Belgium, 3001, Belgium
Kristin De Meyer
Affiliation:
[email protected], IMEC, SPDT, Kapeldreef 75, Leuven, Belgium, 3001, Belgium
Get access

Abstract

Several aspects of the integration of diffusion-less junctions in a NMOS and PMOS conventional flows are evaluated. Processes as Solid Phase Epitaxial Regrowth (SPER) or advanced annealing techniques, as flash or laser, demonstrates benefits not only on the 1D junction profiles but also on the transistor characteristics. An optimization of the implants and of the annealing conditions lead to improved or equivalent transistors performance and short channel effects control compared to the conventional spike RTA process. A significant gain in the overlap capacitance could allow for reduced CV/I. Furthermore the junction leakage can be lowered down to the values reached with the conventional spike RTA process.

Keywords

laser annealingepitaxyannealing
Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 912: Symposium C – Doping Engineering for Device Fabrication , 2006 , 0912-C02-07
Copyright
Copyright © Materials Research Society 2006

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

1 Lindsay, R. et al., IJWT 2004 Google Scholar
2 Lauwers, A. et al., MRS 2004 Google Scholar
3 Jain, S. H. et al., IEEE Trans. Elect. Dev. 2005 Google Scholar
4 Shima, A. et al., IEEE Trans. Elect. Dev. 2005 Google Scholar
5 Pawlak, B. J. et al., Appl. Phys. Lett. 2005 Google Scholar
6 Pawlak, B. J. et al., Appl. Phys. Lett. 2005 Google Scholar
7 Pawlak, B. J. et al., Appl. Phys. Lett. 2004 Google Scholar
8 B, N. E.. Cowern et al., Appl. Phys. Lett. 2005 Google Scholar
9 Mirabella, S. et al., Appl. Phys. Lett. 2005 Google Scholar
10 kottantharayil, A. et al., VLSI 2004 Google Scholar
11 Severi, S. et al., IEDM 2004 Google Scholar
12 Severi, S. et al., MRS 2004 Google Scholar
13 Duffy, R. et al., Appl. Phys. Lett. 2004 Google Scholar
14 Felch, S. et al., ECS 2005 Google Scholar
15 Duffy, R. et al., IEEE Trans. Elect. Dev. 2006 Google Scholar