This paper highlights a number of basic science issues related to wafer cleaning in silicon technology. Particle removal techniques, metal contamination, surface passivation, and integrated processing are used as key examples of areas of active research related to wafer cleaning. It is highlighted that wafer cleaning plays a far more significant role in device processing than just for contamination removal. However, even contamination removal faces formidable challenges such as the determination of safe contamination limits and the detection of trace amounts of contamination, all of which go well beyond the traditional realm of contamination control.

In situ control methods of native oxide growth on Si surfaces at room temperature and during the temperature ramp-up are proposed for metal/Si contact formation, lowtemperature Si epitaxy, and very-thin thermal oxide film formation, based on analyses of factors dominating the oxide growth. Low-resistance W/Si contacts are formed by N2 gas sealed processing of HF cleaning right before W chemical vapor deposition(CVD). Highquality epitaxial Si films are grown at a low temperature of 550°C using Si2H6 molecular flow pre-showering to suppress the oxide growth caused by water or oxygen in a CVD reactor. Very thin gate oxide films with high insulating performance are realized by the preoxidation step at 300°C to form one-molecular-layer oxide for passivation and by the subsequent temperature ramp-up step in ultraclean Ar gas to prevent oxide growth and an increase of surface microroughness before the thermal oxidation step.

Chemical structures of native oxides formed during wet chemical treatments on NH4F treated Si(111) surfaces were investigated using X-ray Photoelectron Spectroscopy (XPS) and Fourier Transformed Infrared Attenuated Total Reflection(FT-IR-ATR). It was found that the amounts of Si-H bonds in native oxides and those at native oxide/silicon interface are negligibly small in the case of native oxides formed in H2SO4-H2O2-H2O solution. Based on this discovery, it was confirmed that native oxides can be characterized by the amount of Si-H bonds in native oxides. Furthermore, it was found that the combination of various wet chemical treatments with the treatment in NH4OH-H2O2-H2O solution results in the drastic decrease in the amount of Si-H bonds in native oxides.

Remote Plasma-enhanced Chemical Vapor Deposition (RPCVD), which involves nonthermal, remote plasma excitation of precursors, has been demonstrated to be a novel and attractive technique for low temperature (150-450C) Si and Sil-xGex epitaxy for applications in Si ULSI and novel Si heterostructure devices which require compact doping profiles and/or heterointerfaces. An in situ low temperature remote hydrogen plasma clean in the Ultra-High Vacuum (UHV) deposition chamber in order to achieve a chemically passive, hydrogenated Si surface with minimal O, C and N contamination, is a critical component of the process. The ex situ wet chemical cleaning consists of ultrasonic degreasing and a modified RCA clean, followed by a final dilute HF dip. The in situ clean is achieved by remote plasma excited H, where H introduced through the plasma column is r-f excited such that the plasma glow does not engulf the wafer. In situ AES analysis shows that the remote H plasma clean results in very substantial reduction of the C, O and N contamination on the Si surface. We believe that the H plasma produces atomic H which, in turn, produces a reducing environment and has a slight etching effect on Si and SiO2 by converting them to volatile byproducts. TEM analysis of the wafers subjected to this clean indicate that defect-free surfaces with dislocation loop densities below TEM detection limits of 105 /cm2 are achievable. Corroborating evidence of achieving an atomically clean, smooth Si surface by remote H plasma clean as obtained from in situ RHEED analysis will also be presented. After in situ H cleaning at low pressures (45 mTorr), typically for 30 min. at a substrate temperature of 310 C, we observe both stronger integral order streaks compared to the as-loaded sample and the appearance of less intense half-order lines indicative of a (2 × 1) reconstruction pattern, indicating a monohydride termination. A (3 × 1) reconstruction pattern is observed upon H plasma clean at lower temperatures (250 C), which can be attributed to an alternating monohydride and dihydride termination. Results of air exposure of hydrogenated Si surfaces by AES analysis indicate that the (3 × l) termination is chemically more inert towards readsorption of C and 0. Successful Si homoepitaxy and Si/Sil-xGex heteroepitaxy under a variety of surface cleaning conditions prove that by a combination of these cleaning techniques, and by exploiting the inertness of the H-passivated Si surface, very low defect density films with 0 and C levels as low as 1X1018 cm−3 and 5×1017 cm−3, respectively, can be achieved.

Surface conditioning issues arising from pattern transfer utilizing plasma etching are discussed. Two situations are considered: one in which an oxide on a silicon substrate is exposed to a plasma etching environment and one in which a silicon substrate is exposed to a plasma etching environment. Both situations can lead to the need for surface conditioning and, in some cases, even 950°C, 30 min. furnace anneals or 1050°C, 26 sec. rapid thermal anneals can fail to restore surface and near-surface properties.

Device quality SiO2 films have been deposited by Remote Plasma Enhanced Chemical Vapor Deposition (RPECVD). The substrate surface cleaning, both ex-situ and insitu, influence the density of trapping states at the Si/SiO2 interface. Pre-deposition exposure to plasma-generated atomic-H significantly reduces hydrocarbon and 0 contamination, but damages the Si surface leading to high interface trap densities (Dit) in the Si band-gap. Pre-deposition exposure to plasma generated O-atoms, removes the residual hydrocarbons, and oxidizes the Si substrate while maintaining an atomically smooth interface. Metal Oxide Semiconductor (MOS) structure fabricated by RPECVD have midgap Dit values of ∼1-3×1010cm−2eV−1 for 0-plasma cleaned surface. Final rinse after RCA cleaning in HF solutions with different pH values affects surface morphology; however surface roughening by atomic-H is always the determinant contributor to high values of Dit.

Ex situ UV/O2 cleaning prior to SiO2 deposition by RPECVD results in an SiO2/Si interface with mid-gap Dit values 2-5 times higher than interfaces formed by in situ exposure of HF-etched wafers to plasma-generated atomic O. In situ exposures to plasma-generated atomic H and atomic O are each effective at removing carbon contamination acquired by the UV/O2 cleaned wafers during transfer and introduction to the RPECVD chamber. However, in situ exposure of the photochemical oxide layer to atomic O results in higher mid-gap Dit values, and in situ exposure to atomic H results in creation of dangling bond defects (Pb centers).

Various surface pre-cleaning processes for rapid thermal in-situ polysilicon/oxide/silicon stacked gate formation have been evaluated. MOS capacitors have been fabricated to assess the effects of surface pre-cleaning on the quality of both Rapid Thermal Oxide (RTO) and Rapid Thermal Chemical Vapor Deposition (RTCVD) oxide. Measurement results have shown that, 1) High temperature (≥ 900 °C) rapid thermal cleaning in Ar, H2 or high vacuum (10−8 Torr) ambients can lead to MOS gates with high leakage current if RTO is used to form the gate oxide, 2) The standard Huang clean and ultra-violet ozone (UV/O3) treatments can improve the film quality for both deposited and thermally grown oxide, and 3) Compared with RTO, the breakdown field of the RTCVD oxide is less dependent on the surface pre-cleaning treatment. These results indicate that silicon wafer surface cleaning techniques typically used for silicon epitaxial processes are not necessarily applicable to oxide film formation in RTP reactors.

We discuss the measurement of the morphology of exposed surfaces and buried interfaces using plan view transmission electron microscopy techniques. We have observed the evolution of the silicon/oxide interface during both oxidation and oxygen etching of the Si (111) surface. We describe the interface morphology, the mechanisms of these oxidation reactions and the implications of these results for the processing of silicon surfaces.

The high temperature anneal of hydrogen terminated silicon has been shown to etch and roughen its surface. We attempt to describe the degree of this roughness and the time scale on which it occurs using several electrical measurements: excess direct tunneling currents, dielectric breakdown and the oscillations in the Fowler-Nordheim tunneling currents. From these results we draw conclusions on the time and water content dependence of pre-oxidation annealing on the microroughness of the Si/SiO2 interface.

Hydrogen passivation of silicon surfaces plays an important role in silicon surface cleaning and preparation. To measure the effect of hydrogen passivation on silicon surface reactivity, Fourier transform infrared (FTIR) transmission spectroscopy was used to monitor the oxidation of silicon surfaces versus hydrogen coverage. Experiments were performed insitu in an ultrahigh vacuum (UHV) chamber using high surface area poroussilicon samples. Si-H stretching and bending vibrations and Si-O-Si stretching vibrations were employed to monitor the silicon surface species. Oxidation studies with O2 conducted versus various initial hydrogen coverages revealed that oxidation rates and apparent oxygen saturation levels on porous silicon decreased as a function of initial surface hydrogen coverage. Exceptional surface stability was observed when the porous silicon surface was passivated by both monohydride and dihydride surface species. In addition, new blue-shifted Si-H stretching and bending features were observed following the oxidation of partially hydrogen-passivated porous silicon which indicated the presence of Ox SiH species. Thermal annealing studies revealed that the thermal stability of these OxSiH species increased with increasing oxidation of the silicon surface. These results have important implications for silicon growth and surface cleaning because they indicate that hydrogen removal is more difficult when the silicon surface is contaminated with oxygen. These FTIR results have also been compared with earlier results of oxidation versus hydrogen coverage on Si(111) 7×7.

We have investigated the effect on a silicon surface of both wet chemical and cluster-tool UV/ozone cleaning, prior to UHV processing to fabricate MOS test structures. The physical and chemical condition of the Si surface has been examined by Scanning Tunnelling and Atomic Force Microscopy (STM, AFM) and Medium Energy Ion Scattering (MEIS). After MOS fabrication some of the structures were examined by Cross-sectional Transmission Electron Microscopy (TEM). The electrical performance of the MOS test sets were characterized by breakdown voltage measurements.

We have found correlations between the electrical performance of the MOS devices, the structure of the Si surface prior to oxidation, and the details of the UHV fabrication technique. In particular any MOS device fabricated on a Si surface thermally cleaned in UHV prior to oxidation has a poor breakdown strength. We have found that this is the result of the formation of silicon carbide on the Si surface at high temperature and the subsequent local disruption of the oxidation step of MOS fabrication by the SiC. A UHV cleaning procedure has been developed to avoid this C contamination problem.

Chemical bonding features and suboxide compositions in native oxide grown on chemically-cleaned hydrogen-terminated Si(100) surfaces stored in pure water have been studied by using surface sensitive infrared spectroscopy and x-ray photoelectron spectroscopy. The LO phonon peak for the native oxide is located at 1210cm−1, which is shifted to a significantly lower wavenumber side than the ultrathin thermal oxide peak at 1250cm−1. This is because an appreciable amount of SiHx bonds are incorporated in the native oxide/Si interface and such hydrogen termination in the network dramatically reduces strained bonds in the interface. Very weak Si2+ suboxide signal from the oxide grown in pure water is also explained by the incorporated SiHx bonds which interrupt the Si2+ suboxide formation in the interface.

The HF/Ethanol cleaning treatment is analyzed in comparison to the HF/H 20 one. The surface analysis is made on <100> silicon wafers with sacrificial oxide layer and silicon wafers with different crystallographic orientation without sacrificial layer. The results deduced from Atomic Force Microscopy, X-ray Photoelectron Spectroscopy and ellipsometry, show that siliconfluorine bonds are related with reactive sites. The structure of the thermally thin oxide layer grown after both cleanings has been analyzed and the electrical measurements show better performance for the HF/Ethanol cleaning.

Material and device reliability issues play a critical role in the choice of materials and processing options for ULSI technology and manufacturing. Recently, chemical surface treatments (e.g., fluorine incorporation, nitridation) have been shown to benefit MOSFET gate dielectric reliability. This paper describes the impact of different pre-oxidation chemical surface treatments on the reliability characteristics of MOS structures by using a combination of x-ray irradiation and electrical stress-induced charge injection techniques. X-ray irradiation at 1-2 keV increases oxide-trapped charge and the density of interface states substantially (80-800X), but these changes depend significantly on the chemistry of pre-oxidation cleaning. Furthermore, the specific surface treatment strongly affects subsequent device reliability; MOS degradation is up to 5X lower when fluorine-based surface pre-cleaning is used.

Rutherford backscattering ion-channeling spectrometry (RBS) and 2-channel spectroscopic polarization modulation ellipsometry (2-C SPME) were combined in a study of 3- to 16-nm SiO2 films to discern possible differences between conventional MOS oxides, modified surface preparation, and stacked-oxide processes which combine chemical vapor deposition with furnace oxidation. An excess silicon scattering is observed by RBS, which suggests atomic displacements associated with interfacial roughness and strain in the crystalline Si. Ellipsometry observes an increase in refractive index with decreasing film thickness, which is consistent with interfacial roughness or Si strain. The various preparation methods for device-quality MOS oxides yielded essentially equivalent results and film densities close to bulk, fused SiO2.

This paper presents the results of surface cleaning and passivation of Si and oxide surfaces for the growth of Si/oxide/Si structures. Silicon surfaces are cleaned by the spin—etch process prior to the growth of silicon oxide. A silicon layer is then deposited after subsequent surface cleaning and chemical treatment on the surface of oxide/Si. Both the oxide and the silicon layers are grown in a plasma enhanced chemical vapor deposition system. The interface structure between layers of deposited Si/oxide/Si are observed by cross—section transmission electron microscopy (XTEM).

We have developed a new method of evaluating Si surface micro-roughness, by forming thin oxide in HCI/H2O2 solution and then measuring the concentration of chlorine atoms or the total charge in this oxide. It is shown that this oxide does not affect the surface micro-roughness, and the surface concentration of chlorine atoms incorporated in this oxide and the total oxide charge are proportional to the surface micro-roughness, as obtained by AFM. From these correlations, it is possible to evaluate the surface microroughness for large areas compared with the areas of AFM measurement.

The sputter-anneal cleaning process is one of the most common methods of producing clean, defect free, crystalline Si surfaces. However the effects of small amounts of residual Carbon, probably the most insidious surface contaminant, and of Inhomogeneities in the sputter profile have not been investigated in any detail.

Using a very high resolution Kelvin probe coupled with Auger Electron Spectroscopy (AES), we have followed the changes in work function, together with surface contaminants, throughout the cleaning process. We show that very small amounts of surface carbon contamination, at or about the AES detection limit, lead to a significant increase in work function of the “Clean surface”. Further as little as 0.6% Carbon substantially influences the initial stages of oxidation of the Si(111) 7×7 surface by (i) hindering formation of the elementary dipole layer and (ii) enhancing oxygen penetration through the surface layer into deeper layers.

We have also measured work function profiles of a Si(111) 7×7 sample during sputtering. Inhomogeneities in the sputter profile, particularly around the periphery, are clearly evident and produce variations in work function of some 200 meV across the specimen. Repeated sputter-anneal cycles lead to a degree of disorder in these regions and this is reflected in a different oxidation behaviour.

We conclude that work function measurements are both simple to perform and can be utillsed to determine the presence of surface contamination and roughness. As the oxide layer thickness in MOS devices continues to diminish the detection and elimination of residual Carbon contamination will play an ever increasing role in determining device performance. The Kelvin probe can be used at elevated temperatures and pressures and has potential applications in alternative surface cleaning methods including flash annealing and chemical preparations.

Spectroscopic ellipsometry (SE), with the added capability of variable angle of incidence, is a sensitive technique for nondestructive surface and interface analysis. In this work, we demonstrate the application of this technique to the quantitative characterization of surface and subsurface damage in Si and GaAs, induced by conventional chemical-mechanical polishing. We show that the optimum selection of angle of incidence and spectral range is of crucial importance for detecting and evaluating surface and subsurface quality. To adequately describe the measured SE data, a two-layer model (i.e. oxide overlayer/subsurface damage layer/substrate) was found to be necessary. In this model, the oxide overlayer and subsurface damage layer were each modeled as a simple physical mixture of the chosen constituents, using the Bruggeman effective medium approximation. SE analysis clearly indicated the presence of surface microscopic roughness and subsurface damage for all the samples investigated. Typical results for thickness were 2 to 3 nm of surface overlayer, and 15 to 40 nm of damage beneath it, containing about 1 ∼ 2% volume fraction of either oxide or voids. As verification, atomic force microscopy (for surface characterization) and wet chemical oxide stripping (for subsurface analysis) were used to substantiate the SE results.