Layer transfer of thin BaTiO3 films onto silicon-based substrates has been investigated. H+ and He+ ion implantation created a buried sacrificial layer in the BaTiO3 single crystals. Thermodynamics and kinetics of cavity nucleation and growth at the bonding interface have been investigated and single crystal thin film layers were transferred onto amorphous Si3N4 and Pt substrates. We have found that defects generated by ion implantation in ferroelectric materials can be significantly recovered with the subsequent annealing for layer splitting. Also, after high dose ion implantation, the films remain single crystal and stoichiometry. Finally, characterization proves the layer-transferred thin films are ferroelectrically active, with domains and piezoresponse similar to bulk crystals.

We have characterized the structure of epitaxial Al2O3 films deposited on Si (111) substrate using electron beam evaporation from a high-purity single crystal sapphire source in a molecular beam epitaxy (MBE) approach. The structural studies were carried out mainly by single crystal x-ray diffraction with the initial epitaxial growth observed by in-situ reflection high energy electron diffraction. The Al2O3 films grow in the cubic γ-phase with a very uniform thickness, and a high structural perfection. The <111> axes of the film and the Si substrate are well aligned. A mosaic scan of the Al2O3 (222) peak (with no in-plane component) finds a 0.3 degree (or 18') spread. All three unit cell vectors of the film and the substrate are parallel, but the in-plane cone scans of the {004} and {044} diffraction peaks about the surface normal find a ±3 degree film in-plane rotation with respect to the substrate surface orientation.

We report the results of a recent study on the deposition of praseodymium oxides thin films on silicon substrates by Metal-Organic Chemical Vapor Deposition (MOCVD). A suited Pr(III) β-diketonate precursor has been used as the metal source and the deposition conditions have been carefully selected because of a large variety of possible PrO2−x (x= 0−0.5) phases. Pr2O3 films have been obtained in a hot-wall MOCVD reactor under non oxidising ambient at 750°C deposition temperature. The structural and morphological characteristics of Pr2O3 films have been carried out by X-ray diffraction (XRD) and high resolution transmission electron microscopy (TEM). Chemical compositional studies have been performed by X- ray photoelectron spectroscopic (XPS) analysis and a fully understanding of the MOCVD process has been achieved. Preliminary electrical measurements point to MOCVD as a reliable growth technique to obtain good quality praseodymium oxide based films.

The electrical behavior of decananometer MOS transistors with high-k dielectric gate stack has been investigated using 2D numerical simulation. Two important electrostatic limitations of high-k materials have been analyzed and discussed in this work: i) the gate-fringing field effects which compromise short-channel performance when simultaneously increasing the dielectric constant and its physical thickness and ii) the presence of discrete fixed charges in the gate stack, suspected to be at the origin of the stretch-out of C-V characteristics, that induces 2D potential fluctuations in the structure. In both cases, the resulting degradation of transistor operation and performance is evaluated with a two-dimensional quantum simulation code.

Microstructure studies of ultra-thin BaTiO3 thin films (2-10 nm thick) show nano-domains having a width as small as one unit cell. Only 180° nano-domains are formed in multi-domains structures. The domain-boundaries are formed at {001} twin boundaries. Most of the domains are oriented in parallel to the film plane but out-of-plane orientations are also observed. The films exhibit ferroelectric behavior characterized by a polarization hysteresis loop and a relatively fast switching time. A remnant polarization of about 0.5 μC/cm2 and coercive field of 2.7 V/cm were measured in parallel to the film plane. Temperature-dependent measurements show two peaks of the dielectric constant at about 60°C and 115°C. These peaks are attributed to two transition temperatures associated with the orientation of the nano-domains relative to the film plane and stress.

TiO2 and nickel-silicide layers are consequently deposited and micro machined to compose a mesa-structured tunneling transistor. The depositions are done with the RF-sputtering method and the electrical and physical characteristics of the products are investigated. Transistors show an amplification coefficient of about 20. To improve the quality and coverage of the TiO2 layer, the oxide deposition is made by means of an APCVD reactor. The grown oxide shows a dielectric coefficient between 19 and 21 and its breakdown field is about 107 V/cm.

In this paper we present results of indium doped zinc oxide deposited at room temperature by rf magnetron sputtering, with electron mobility as high as 60 cm2/Vs. The films present a resistivity as low as 5 × 10-4 ωcm with an optical transmittance of 85%. The structure of these films look-like polymorphous (mixed of different amorphous and nanocrystalline phases from different origins) as detected from XRD patterns (no clear peak exists) with a high smooth surface, as detected from SEM micrographs, highly important to ensure long life time when used in display devices.

The dielectric breakdown behavior of poly-Si gate CMOSFETs with HfAlOx/SiON gate dielectric fabricated using mass production worthy 300 mm process was investigated. If SiO2 is used as an interfacial layer (IL), the IL reduction and the intermixing between the HfAlOx layer and the IL occurred, which causes extrinsic breakdown. By using the SiON of [N]=18% as an IL and setting the maximum temperature after the HfAlOx deposition to be 1000°C, the interfacial reaction was suppressed and the extrinsic breakdown component was eliminated. In the case of the n-capacitor accumulation, an abrupt increase of gate leakage was observed, which is believed to correspond to the IL breakdown. The mean time to failure (MTTF for 0.1cm2 at 125°C) is long enough. On the other hand, gate current initially decreases and then starts to increase in the case of p-capacitor accumulation. If we define the time to breakdown at the onset of current increase, the MTTF would be only 3.7 years if it obeys the V-plot (MTTF predicted by 1/V-plot was 1.6×107 years).

We report on processing and properties of La0.67(Sr,Ca)0.33MnO3(LSCMO) films grown by pulsed laser deposition technique on Si(001) substrates buffered with Bi4Ti3O12/CeO2/YSZ heteroepitaxial layers. X-ray diffraction shows cube-on-cube growth of epitaxial Bi4Ti3O12/CeO2/YSZ/Si heterostructure whereas the LSCMO layer grows in the “diagonal-on-side” manner onto the Bi4Ti3O12 (BTO) template. High resolution TEM images demonstrate sharp interfaces between the buffer layers and LSCMO film as well as rare misfit dislocations on the CeO2/YSZ interface. LSCMO film processing conditions have been optimized to get maximum temperature coefficient of resistivity TCR = 4.4%K-1 and colossal magnetoresistance(CMR) ‘Delta;ρ/ρ ∼ 2.9%kOe-1 @ 294K. Almost ultimate CMR performance at room temperature has been achieved due to successive improvement of c-axisorientation of layers: full widths at half-maximum (FWHM) 0.65, 0.58, 0.65, 1.13 and 0.18 degrees in LSCMO/BTO/CeO2/YSZ/Si stack, respectively. Characterization of electrical noise in CMR film yields noise equivalent temperature difference (NETD) as low as 1.2 ‘mu;K/√Hz @ 30Hz and 294K.

HfO2 films were deposited by reactive sputtering on Ge and Si substrates simultaneously, and we found not only the interface layer but the HfO2 film was thinner on Ge substrate compared with that on Si substrate. A metallic Hf layer has a crucial role for the thickness differences of both interface layer and HfO2 film, since those thickness differences were observed only when an ultrathin metallic Hf layer was predeposited before HfO2 film deposition. The role of metallic Hf is understandable by assuming a formation of volatile Hf-Ge-O ternary compounds at the early stage of film growth. These results show an advantage of HfO2/Ge over HfO2/Si systems from the viewpoint of further scaling of electrical equivalent thickness of the gate oxide films.

Ultra-thin HfOxNy gate dielectric films were deposited by pulse-mode metalorganic chemical vapor deposition (MOCVD) with [(C2H5)2N]4Hf (TDEAH) and either NO or O2 as oxidants. Nitrogen incorporation was studied by x-ray photoelectron spectroscopy (XPS) and spatially-resolved elemental profiles were obtained by scanning transmission electron microscopy (STEM) coupled with electron energy loss spectroscopy (EELS) and energy dispersive x-ray spectroscopy (EDS). The results indicate that nitrogen is incorporated throughout the high-k film with a higher concentration in the interface layer between the deposited layer and the Si(100) substrate. The concentration of nitrogen is increased in both layers by using NO instead of O2 as the oxidant. The N in the deposited and interface layers can be replaced by oxygen during oxygen ambient annealing at temperatures above 500 °C. Films with 8 at.% nitrogen remain amorphous following vacuum annealing at temperatures up to 800 °C. By encapsulating vacuum-annealed films with amorphous Si from an e-beam evaporator prior to removal from the cluster tool, it was possible to reduce the thickness of the interface layer upon air exposure to the 0.5 nm range.

Resonant photoelectron spectroscopy (PES) at the Pr4d and O1s absorption edges is used to study the electronic properties at the interface of epitaxial grown Pr2O3 on Si(001).

In the electronic structure of bulk Pr2O3 the valence band (VB) states are predominantly of Pr6s and O2p atomic parentage. The contribution of Pr4f states are identified from the strong increase the VB features at the Pr4d resonances. The data at the O1s edge are caused by Raman scattering and resonant Auger decay and reflect the existence of CT complexes. They are the consequence of mixed valency caused by ligand-to-Pr4f charge transfer states. The decrease of their intensity is attributed to an increase in covalent bandwidth between the Ligand (O2p, Si3p) and Pr4f states. The CT complexes originally localized now become broadened and form gap states which fill the gap towards a metallic density of states. The metallic phase may be hindered upon alloying with SiO2 or other oxides

A Xe flash lamp (FL) heating technique was applied to the post deposition annealing process (PDA) for HfAlOx/SiO2 gate insulator with poly-Si or W/TiN gate electrode in a gate last based process. In the case of W/TiN/HfAlOx/SiO2, CV hysteresis with less than 10mV was achieved using the FL-PDA. However, the FL-PDA increased hysteresis width up to over 100 mV when poly-Si was used as a gate electrode. That occurred also with low temperature (700 °C) rapid thermal PDA process. The lower thermal budget achieved by the flash lamp annealing and the metal gate is effective to suppress the interfacial reaction which causes the traps responsible for the hysteresis. Charge trapping in the W/TiN/HfAlOx/SiO2 was evaluated using CV hysteresis characteristics in the MISFETs and the MIS capacitors. Electron was major trapped charge of the HfAlOx.

Aluminum nitride (AlN) thin films were deposited from trimethyl aluminum (TMA) and Ammonia (NH3) by thermal atomic layer deposition (thermal ALD) and plasma enhanced atomic layer deposition (PEALD) on 200 mm silicon wafers. For both thermal ALD and PEALD, the deposition rate increased significantly with the deposition temperature. The deposition rate did not fully saturate even with 10 seconds of NH3 pulse time. Plasma significantly increased the deposition rate of AlN films. A large number of incubation cycles were needed to deposit AlN films on Si wafers. 100% step coverage was achieved on trenches with aspect ratio of 35:1 at 100 nm feature size by thermal ALD. X-ray diffraction (XRD) data showed that the AlN films deposited from 370 °C to 470 °C were polycrystalline. Glancing angle X-ray reflection (XRR) results showed that the RMS roughness of the films increased as the film thickness increased.

We have characterized the structure of the epitaxial Sc2O3 films grown on a α-Al2O3 (111) substrate using molecular beam epitaxy (MBE) techniques. The Sc2O3 films grow in the bulk bixbyite phase with a very uniform thickness, and a high structural perfection. They grow with their cubic (111) axis parallel to the rhombohedral (111) axis of the sapphire substrate. The in-plane orientation of the films, however, is rotated by ±30 degrees with respect to the substrate rhombohedral axes. This is explained by the presence of two equivalent orientations of the 3-fold axis of the film on the quasi 6-fold surface of the substrate.

Na0.5K0.5NbO3 (NKN) and Pb(Zr0.53Ti0.47)O3 (PZT) films have been grown by rf-magnetron sputtering and pulsed laser deposition techniques, correspondingly, on sapphire (Al2O3-0112, rcut), YAlO3 + 1% Nd (Nd:YAlO3-001), and quartz (Y+36°-cut) single crystal substrates. Interdigital capacitor (IDC) of coplanar waveguide (CPW) structures were defined by a standard lift off technique in a Au(0.5μm)/Cr(10nm) electrode electron beam evaporated on ferroelectric film surface. IDCs consisted of five pairs of fingers separated by 2 and 4 μm gap. On-wafer microwave characterization was performed using a workbench equipped with a coplanar probe station (Cascade Microtech) with G-S-G (Ground-Signal-Ground) Picoprobe, a network analyzer (Agilent Technologies E8364A) operating in 45 MHz to 40 GHz range and programmable power supply for dc DUT (Device Under Test) biasing. Assumed equivalent circuit for the IDC/CPW structure contains planar capacitor under test C, the coplanar line with a complex impedance ς and a parasitic capacitance Cp between the signal and ground lines. The de-embedding technique has been employed to determine all six complex parameters C, ς and Cp from S-parameter measurements performed for three different device structures: device, open and thru. NKN film interdigital capacitors on sapphire show superior performance in this microwave range: the frequency dispersion was as low as 18%, voltage tunability = 1 – C(40V)/C(0) (40 V, 200 kV/cm) about 14%, loss tangent ∼ 0.11, K-factor = tunability/tanδ from 131% @ 10 GHz to 56% @ 40 GHz. The reliability of the de-embedding procedure is clearly proved by analysis of the frequency dependences of the parasitic capacitance and loss tangent as well as impedance of the coplanar line. Within the accuracy of experimental data and de-embedding calculations these values appear to be voltage independent: Cp ∼ 70 fF, tan δp changes from 0.07@10 GHz to 0.15@40 GHz; real and imaginary part of interconnect impedance increases with frequency from 0.16Ω@10 GHz to 0.36Ω@40 GHz and from 1.6Ω@10 GHz to 5.84Ω@40 GHz respectively.

The sidewalls of etched Si lines will be the carrier channel surfaces in FinFET devices. These surfaces must be as smooth as possible for optimal device performance. Thus, the ability to quantitatively measure sidewall roughness is essential to process development. A methodology to quantitatively measure Fin sidewall roughness by AFM is presented. The samples were prepared for measurement by cleaving along the length of the Fins or dense-line test structures and by FIB polishing to bring the edge of the sample close to the sidewall of the etched feature. The cleaved and FIB-polished sample was mounted 17 degrees shy of normal. This exposes the sidewall on the top surface while preventing shadowing of the lower part of the sidewall due to contact between the side of the probe support and the cleaved or polished edge. Quantitative AFM measurements taken by this method show meaningful differences in the sidewall roughness for samples that have seen different sidewall smoothing treatments. The average observed rms roughness values for various surface-smoothing treatments range from 0.8 to 1.8 Å for a 50 nm square area.

Oxidation states of AlOx in Co/AlOx/Co spin tunneling junctions were studied using X-ray photoelectron spectroscopy. Co(10nm)/AlOx/Co(50nm) spin tunneling junctions were fabricated on glass substrates by ion-beam mask sputtering. The Al layers were deposited in various thicknesses and were oxidized in pure O2 gas for 24-48 hours at room temperature. Co/AlOx bilayers simultaneously fabricated were analyzed by XPS. The thicker the Al layer is deposited, the more the unoxidized Al remains. MR ratio of the junctions increasedas the unoxidized Al decreased, and this result is qualitatively in agreement with the LMTO calculation result. The O/Al ratio of AlOx layer is about 1.9-2.0, which means existence of the higher order oxides than Al2O3. XPS depth profiles showed that the unoxidized Al remains not only near the interface with Co but also near the surface when the deposited Al layer thickness isthick.

A series of self-assembled molecules have been investigated as deactivating agents for the HfO2 atomic layer deposition (ALD). Three important factors of self-assembled monolayers (SAMs) deactivating efficiency towards ALD--chain length, reactivity and steric effect--have been investigated and discussed as well as the initial blocking mechanism of this process. This investigation shows that in order to achieve satisfactory deactivation, it is crucial to choose high reactivity, low steric effect molecules with certain chain length to form condensed, high hydrophobic organic monolayers.

The International Technology Roadmap for Semiconductors (ITRS) has projected that continued scaling of planar CMOS technology to the 65nm node and beyond will require development of high-k films for transistor gate dielectric applications to allow further scaling of overall device sizes according to Moore's Law [1]. Researchers have recently been studying hafnium-based high-k dielectrics as an alternative to SiO2 [2]. The method of deposition of these films has been found to impact the applicability of the films for both low standby power and high performance applications [3]. Atomic Layer Deposition (ALD) has been among the more widely studied deposition techniques for these films, but previous work has emphasized ALD utilizing inorganic precursors [4]. In this paper, we shall describe a process in which hafnium oxide and hafnium silicate films were deposited from alternating pulses of volatile metal-organic Hf/Si liquid precursors and ozone on 200mm diameter Si substrates using a single wafer ALD system. Electrical characterization of the films is presented, including equivalent oxide thickness (EOT), gate leakage, and electron mobility data, showing an achievement of EOT's ranging from 1.19 to 1.69 nm with high field mobilities from 74% to more than 90% of that of SiO2 (2.1 nm film), and Jg in the range of 80mA to 3 A/cm2.