Material removal during CMP occurs by the activation of slurry particles at contact points between pad summits and the wafer. When slurry is present and the wafer is sliding, contacts become lubricated. We present an analysis valid over the full range from static contact to hydroplaning that indicates that CMP usually operates in boundary or mixed lubrication mode at contacts and that the lubrication layer is nanometers thick. The results suggest that the sliding solid contact area is mainly responsible for the friction coefficient while both the solid contact and lubricated areas control the removal rate.

Monodispersed ceria coated silica particles were prepared by a new type of ceria precursor. The ceria precursor was synthesized by alkoxide method, which employs ethanol as solvent. The synthesized particles were characterized with scanning electron microscopy (SEM), transmission electron microscopy (TEM), X-ray diffraction (XRD) and X-ray photoelectron spectroscopy (XPS). It was found that well-crystalline ceria coatings were deposited on the surface of the silica particles without post-heat treatment. In addition, the coated particles prepared by a new precursor were uniformly dispersed without the formation of hard aggregate as compared to those obtained by conventional method.

Chemical Mechanical Planarization (CMP) has emerged as the central technology for polishing wafers in the semiconductor manufacturing industry to make integrated multi-level devices. Both chemical and mechanical processes work simultaneously to achieve local and global planarization. Although extensive research has been carried out to understand the various factors affecting the CMP process, many aspects remain unaddressed. One such aspect of CMP is the role of abrasives in the process of conditioning. Abrasives play an important role during conditioning to regenerate the clogged polishing pads. This research is focused on the study of abrasives in the process of conditioning with a focus on the size of abrasives. With diamond being widely used as an abrasive for conditioning the polishing pad, five different sizes of diamonds ranging from 0.25μm to 100μm were selected to condition the commercially available IC 1000 polishing pad. Properties like pad roughness and pad wear were measured to understand the effect of the abrasive size on the pad morphology and pad topography. In-situ ‘coefficient of friction’ was also monitored on the CETR bench top tester. The final impact was seen in the form of surface defects on the polished copper wafers using optical microscopy.

Today the requirements for reducing the impact of our manufacturing activities are increasing as the world awakes to and addresses the environmental impacts of our society. Energy consumption, greenhouse gas emissions, materials availability and use, environmental impact levels, etc. are all topics of interest. Semiconductor manufacturing in general and process steps such as CMP are not exempt from this and, in many cases, the industry has led the efforts in reducing impacts. This paper will first review some of the drivers for sustainable manufacturing, then define some of the terms that will be useful for determining the engineering aspects of sustainability and sustainable manufacturing, as well as metrics for assessing the impact of manufacturing in general and CMP in particular. An assessments of CMP will be given to illustrate the potential for “design for the environment” in CMP and related processes. Consideration will be given to research opportunities, including process modeling, that this focus provides to CMP researchers, consumable suppliers and industry.

With the rapid change of materials systems and decreased feature size, thin film microstructure and mechanical properties have become critical parameters for microelectronics reliability. An example of a major driver of this new technology is the data storage community who is pushing for 1 Terabit/square inch on its magnetic disk hard drives. This requires inherent knowledge of the mechanical properties of materials and in depth understanding of the tribological phenomena involved in the manufacturing process. Chemical mechanical polishing (CMP) is a semi-conductor manufacturing process used to remove or planarize ultra-thin metallic, dielectric, or barrier films (copper) on silicon wafers. The material removal rate (MRR), which ultimately effects the surface topography, corresponding to CMP is given by the standard Preston Equation, which contains the load applied, the velocity of the pad, the Preston coefficient which includes chemical dependencies, and the hardness of the material. Typically the hardness, a bulk material constant, is taken as a constant throughout the wafer and thereby included in the Preston coefficient. Through metallurgy studies, on the micro and nano scale, it has been proven that the hardness is dependent upon grain size and orientation. This research served to first relate the crystallographic orientation to a specific hardness value and secondly use the hardness variation in the previously developed particle augmented mixed-lubrication (PAML) model to simulate the surface topography and MRR during CMP. Recent test and results show that currently there is no empirical formula to relate the crystallographic orientation and thereby a critically resolved shear stress (CRSS) to a specific hardness value. The second part of this investigation utilized the variation in hardness values from the initial study and incorporated these results into the PAML numerical model that incorporates all the physics of chemical mechanical polishing (CMP). Incorporation of the variation of hardness resulted in a surface topography with a difference in roughness (Ra) from the bulk constant hardness value of 60 nm. The material removal rate (MRR) of the process differs by 2.17 μm3/s.

The effect of polisher kinematics on average and standard deviation of shear force and removal rate in copper CMP is investigated. A ‘delamination factor’ consisting of average shear force, standard deviation of shear force, and required polishing time is defined and calculated based on the summation of normalized values of the above three components. In general, low values of the ‘delamination factor’ are preferred since it is believed that they minimize defects during polishing. In the first part of this study, 200-mm blanket copper wafers are polished at constant platen rotation of 25 RPM and polishing pressure of 1.5 PSI with different wafer rotation rates and slurry flow rates. Results indicate that at the slurry flow rate of 200 ml/min, ‘delamination factor’ is lower by 14 to 54 percent than at 400 ml/min. Increasing wafer rotation rate from 23 to 148 RPM reduces ‘delamination factor’ by approximately 50 percent and improves removal rate within-wafer-non-uniformity by appx. 2X. In the second part of this study, polishing is performed at the optimal slurry flow rate of 200 ml/min and wafer rotation rate of 148 RPM with different polishing pressures and platen rotation rates. Results indicate that ‘delamination factor’ is reduced significantly at the higher ratio of wafer to platen rotation rates.

In chemical-mechanical polishing (CMP) the material removal efficiency (MRE) can be defined as the fraction of the total pressure distributed on the abrasives, and it depends on the interplay between the direct contact of the pad-to-wafer, and the contact of the abrasives with the wafer. The MRE can be increased by minimizing pad-wafer direct contact, as this is not likely to help material removal, significantly. The objective of this work is to investigate parameters that control MRE. This may be especially important for low-pressure CMP used in the polishing of (ultra-low-k) ULK dielectric materials. The optimization of CMP parameters to maximize the MRE is described by modeling the contact interactions between pad, abrasives and wafer. A relationship for optimal abrasive concentration is presented for the external load values that mark the transition from pure pad-wafer-abrasive contact to mixed contact (combination of pad-wafer-abrasive and pad-wafer contacts) and for given pad porosity and pad surface parameters.

In this paper, the electrochemical behavior of copper in aqueous solutions containing phosphoric acid (H3PO4) is investigated to elucidate the role of H3PO4 in the Cu ECMP slurries. Aqueous solubility and potential-pH diagrams were constructed for copper-phosphate-water system. Good correlations were found between the diagrams and the experimental polarization data. It was found that H3PO4 might not able to sufficiently increase the solubility of copper alone. A complexing agent is needed to ensure the high solubility of copper, especially as the slurry pH and dissolved copper concentration increase. Specific conductance measurements revealed that phosphoric acid was the key constituent responsible for increasing the conductivity of the ECMP electrolyte. In situ electrochemical polarization experiments showed that the planarization mechanism during the ECMP process was similar to that observed in conventional copper CMP.

Si/Ge heterostructures are one of the most promising performance boosters for next generation CMOS circuits. Lattice mismatch between Si and Ge enables us to manipulate lattice strain, that is, strain engineering is possible. The strain highly alters band structures and gives rise to band splitting and/or effective mass reduction, which brings significant mobility enhancement of the carriers in the strained channel.

High mobility channels such as strained-Si and strained-Ge can be formed on strain-relaxed SiGe buffer layers called SiGe virtual substrates (VS). Since the property of the SiGe VS directly affects that of the overgrown channel layer, creating high-quality SiGe VS is highly required to obtain high performance devices. One critical problem is a very large surface roughness arising on the SiGe VS. So-called crosshatch pattern appears on the surface, irrespective of growth methods. Since strain field coming from the underlying misfit dislocation arrays is responsible for this roughness formation, it is very difficult to create a roughness-free surface.

To overcome this problem, we employed chemical mechanical planarization (CMP) for the purpose of eliminating the roughness. Since CMP is established technology for Si wafer production, it is reasonably applicable to SiGe. Adopting the similar process as Si CMP, we demonstrated that an initial roughness of larger than 10 nm was reduced considerably down to less than 1 nm.

Post-CMP cleaning is an additional issue of great importance for regrowth of device channel structures. We found that the roughness increased during post-CMP cleaning process due to laterally nonuniform etching rate of the SiGe surface. To overcome this, we optimized the cleaning procedure, especially cleaning solution, and successfully obtained very smooth surface with RMS roughness of less than 0.4 nm, the lowest value ever obtained for SiGe surfaces.

The planarized SiGe VS was applied to strained channel structures. Strained Si modulation doped structure was fabricated on the planarized SiGe VS with a Ge concentration of 30 %. The electron Hall mobility obtained from the structure with CMP was 4 times higher than the reference structure without CMP, which is a clear evidence that the roughness-related carrier scattering can be well suppressed by the planarization. Strained Ge channel modulation doped structure was also fabricated on the SiGe VS with much higher Ge concentration (65 %). Although the roughness was much larger than 10 nm due to the high Ge concentration, the surface smoothness less than 1 nm was obtained by CMP. As a result, hole mobility enhancement factor over the reference sample without CMP was found to reach as high as 8 at low temperature and 1.8 at room temperature. These results clearly indicate that CMP is very promising technology for high performance strained Si/Ge based CMOS circuit.

To meet the stringent requirements of device integration and manufacture, surface defects and mechanical stresses that arise during chemical mechanic planarization (CMP) must be reduced. Towards this end, we have synthesized multiple hybrid and composite particles on micron length scales consisting of siloxane co-polymers functionalized with inorganic nanoparticles. These particles can be easily tailored during synthesis, leading to softer or harder abrasion when desired. Upon using these particles for the planarization of silicon oxide wafers, we obtain smooth surfaces with reduced scratches and minimal particle deposition, which is an improvement from conventional abrasive materials like pure silica, ceria and alumina nanoparticle slurries. Tribological characteristics during polishing were examined using a bench top CMP tester to evaluate the in situ co-efficient of friction. Characterization of the hybrid and composite particles has been done using infrared spectroscopy, dynamic light scattering, and electron microscopy. Surface roughness of the wafers was examined using atomic force and optical microscopy while removal rate measurements were conducted using ellipsometry at multiple angles.

During copper CMP, abrasives and asperities interact with the copper at the nano-scale, partially removing protective films. The local Cu oxidation rate increases, then decays with time as the protective film reforms. In order to estimate the copper removal rate and other Cu-CMP output parameters with a mechanistic model, the passivation kinetics of Cu, i.e. the decay of the oxidation current with time after an abrasive/copper interaction, are needed. For the first time in studying Cu-CMP, microelectrodes were used to reduce interference from capacitive charging, IR drops and low diffusion limited currents, problems typical with traditional macroelectrodes. Electrochemical impedance spectroscopy (EIS) was used to obtain the equivalent circuit elements associated with different electrochemical phenomena (capacitive, kinetics, diffusion etc.) at different polarization potentials. These circuit elements were used to interpret potential-step chronoamperometry results in inhibiting and passivating solutions, notably to distinguish between capacitive charging and Faradaic currents.

Chronoamperometry of Cu in acidic aqueous glycine solution containing the corrosion inhibitor benzotriazole (BTA) displayed a very consistent current decay behavior at all potentials, indicating that the rate of current decay was controlled by diffusion of BTA to the surface. In basic aqueous glycine solution, Cu (which undergoes passivation by a mechanism similar to that operating in weakly acidic hydrogen peroxide slurries) displayed similar chronoamperometric behavior for the first second or so at all anodic potentials. Thereafter, the current densities at active potentials settled to values around those expected from polarization curves, whereas the current densities at passive potentials continued to decline. Oxidized Cu species typically formed at ‘active’ potentials were found to cause significant current decay at active potentials and at passive potentials before more protective passive films form. This was established from galvanostatic experiments.

To improve yield rates during integrated circuit fabrication a better understanding of the material removal process during CMP is sought. Many material removal models have been generated to predict the material removal rate (MRR) during CMP. The majority of such models estimate that the MRR is equal to the material removed by a single particle multiplied by the total number of particles contributing to the wear process. Particles contributing to the wear process are known as ‘active particles’. Several authors have proposed analytical models to estimate this quantity. This work introduces a new method for estimating the number of active particles in CMP by deducing it from the polish results of a multi-physics CMP model. By employing the particle-augmented mixed lubrication model (PAML) developed by Terrell and Higgs (2008), it is possible to determine the number of active particles in CMP. The predictions of PAML are compared with two popular analytical approaches which have been commonly used to predict the number of active particles during CMP.

Copper CMP is a corrosion-wear process, in which mechanical and chemical-electrochemical phenomena interact synergistically. Existing models generally treat copper CMP as a corrosion enhanced wear process. However, the underlying mechanisms suggest that copper CMP would be better modeled as a wear enhanced corrosion process, where intermittent asperity/abrasive action enhances the local oxidation rate, and is followed by time-dependent passivation of copper. In this work an integrated tribo-chemical model of material removal at the asperity/abrasive scale was developed. Abrasive and pad properties, process parameters, and slurry chemistry are all considered. Three important components of this model are the passivation kinetics of copper in CMP slurry chemicals; the mechanical response of protective films on copper; and the interaction frequency of copper with abrasives/pad asperities. The material removal rate during copper CMP was simulated using the tribo-chemical model, using input parameters obtained experimentally in accompanying research or from the literature.

A multi-physics model encompassing chemical dissolution and mechanical abrasion effects in CMP is developed. This augments a previously developed multi-scale model accounting for both pad response and slurry behavior evolution. The augmented model is utilized to predict scratch propensity in a CMP process. The pad response delineates the interplay between the local particle level deformation and the cell level bending of the pad. The slurry agglomerates in the diffusion limited agglomeration (DLA) or reaction limited agglomeration (RLA) regime. Various nano-scale slurry properties significantly influence the spatial and temporal modulation of the material removal rate (MRR) and scratch generation characteristics. The model predictions are first validated against experimental observations. A parametric study is then undertaken. Such physically based models can be utilized to optimize slurry and pad designs to control the depth of generated scratches and their frequency of occurrence per unit area.

The effects of defects caused by Cu chemical-mechanical polishing (CMP) on time-dependent dielectric breakdown (TDDB) in a damascene structure incorporating a low-k interlevel dielectric layer were investigated experimentally. Comb line capacitor structures were prepared with one of three types of defects (rough Cu surface corrosion, Cu depletion, or crevice corrosion) and stressed at 3.2 to 6.2 MV/cm at 140°C. The first two defects had an insignificant effect on the TDDB characteristics while crevice corrosion at the edges of wires significantly degraded them. Investigation of the effects of Cu oxidation during post-CMP cleaning on the TDDB characteristics revealed that the formation of a non-uniform oxide layer accompanying deionized water rinsing was due to the dissolution of Cu oxide during the post-CMP cleaning process. When a barrier metal slurry containing a soluble inhibitor was used, non-uniform oxide formation on the Cu surfaces during post-CMP cleaning degraded the TDDB characteristics. These results demonstrate the importance of uniform Cu oxidation during post-CMP cleaning for improving the TDDB characteristics.

We have examined the Large Particle Count (LPC) analytical method to see whether there are opportunities to improve both the accuracy and precision in hope of improving the utility of the LPC measurement. We have identified weaknesses in the current method that limit both its accuracy and its precision, and which can introduce count errors in excess of a factor of 10. We propose modifications to the current method which result in both accuracy and precision improvements. We recommend these improvements as absolutely necessary for any experiments designed to test the correlation between LPC and defectivity.

With the increase in integrated circuit (IC) feature density, the quality of chemical mechanical polishing (CMP) becomes more important as the copper interconnects decrease in size. The optimization of the IC manufacturing process will be greatly enhanced if the nanoscale effects on CMP are better understood. CMP-related wear at the sub-micron scale, where a single particle affects the microstructure of individual copper features within the substrate, needs to be investigated to account for wafer-scale variations. Hardness is known to affect the material removal rate, but the grain level mechanism of the removal process is not yet well known. In this work, the orientation-dependence of wear has been investigated by performing nanoscale scratch tests on single crystal copper along different crystallographic planes, indentified using orientation imaging microscopy (OIM). An analysis of the surface forces and post-scratch topography produced during the scratch tests was conducted and the results have been interpreted from a CMP perspective. Ultimately, these results are expected to refine existing material removal rate models which do not consider the sensitivity of microstructure on the CMP process.

A novel end-point detection method based on a combination of shear force and its spectral amplitude was proposed for barrier metal polishing on copper damascene structures. Under some polishing conditions, the shear force changed significantly with polished substrate. On the other hand, the change in shear force was insignificant under certain polishing conditions. Therefore, a complementary end-point detection method by monitoring oscillation frequency of shear force was proposed. It was found that the shear force fluctuated in unique frequencies depending on polished substrates. Using Fast Fourier Transformation, the shear force data was converted from time domain to frequency domain. The amplitude of spectral frequencies corresponding to the rotational rate of wafer carrier and platen was monitored. Significant frequency amplitude changes were observed before, during and after the polished layer transition from barrier film to silicon dioxide film. The results indicated that a combination of shear force and its spectral amplitude analyses provided effective end-point detection for barrier CMP process.

This paper presents the Chemical-Mechanical Polishing of optical and fine-optical glasses, which is employed to fulfill the optical requirements for the surfaces of optical lenses. We present the effect of chemical interactions in the polishing process of optical lenses and show how these interactions can be influenced by the additions of certain chemicals. Furthermore, we present a thermodynamic simulation tool, by which these interactions can be modeled. Thus it is possible to understand the chemistry in the suspension and to simulate recent polishing processes in advance, with new additives or with various intrinsic glass ions from different glasses.

As the design rule of memory devices is scaled down to nanoscale, the number of the CMP process has increased considerably due to the complexity of integration scheme. The CMP for isolation has increased significantly because the isolation process of metal contact plugs and damascene metallization at nanoscale has been successfully enabled by the CMP. The CMP selectivity, which depends strongly on the chemistry of the slurry, must be tuned for the various new materials. Recently, in order to get over the limitation in lateral shrinkage of the memory device, several emerging applications have been investigated extensively. A vertical integration needs the new CMP process such as high removal rate Cu CMP. Next generation memories need the CMP process for new materials such as GeSbTe, conductive oxide, and magnetic materials. Since any nano-size scratch will be a killer defect at the nanoscale memory, both the CMP equipment and the consumables must be maintained with tighter degree of control specifications.