The crystal growth of a seed of cubic SiC into the amorphous material has been investigated by means of classical molecular dynamics simulations. The crystallization process was studied with a set of supercells containing up to 2000 atoms, initially consisting of a 12 Å thick layer of crystalline SiC and a 18 Å thick layer of amorphous SiC at high pressure. The dynamic evolution of crystallization was then followed for several nanoseconds with the simulated annealing technique performed at constant pressure and temperature. The atomic interactions were described by the Tersoff potential. We studied the dependence of the growth process on the crystallographic orientation of the crystalline/amorphous interface by considering three different crystal planes, namely the {100}, {110}, and {111} planes. Within the pressure-temperature range considered in our simulations, we observed the crystal growth only for the {110} and the {111} orientations, but not for the {100} ones. The atomistic details of the growth mechanism are described and discussed.

Numerical simulations of the thermal stress distribution in a SiC boule 2” in diameter and 1” long grown by conventional PVT technique were performed based on the temperature field distribution in a resistively heated growth reactor that was simulated using the GAMBIT-2.0.4/FIDAP-8.6.2 software package. Analysis of the simulation results revealed the existence of a thermal stress, which was excessively nonuniform in distribution and whose magnitude exceeded the value of the critical resolved shear stress of 1.0 MPa by a factor of 2. The high stress initiated plastic deformation and the high temperature provoked the intense self-diffusion processes. The combination of these factors alters the mechanism of plastic deformation, significantly affecting the structural quality of the growing crystal. The influence of self-diffusion processes initiating the formation of interstitial atoms and vacancies; stacking fault formation as a result of the nonconservative motion of the basal plane dislocations; and micropipe formation from the dislocation groups piled up at silicon and carbon second phase inclusions are also discussed.

This paper summarizes recent experimental and simulation results on etching, growth rates and aluminum/nitrogen incorporation in SiC epitaxial layers grown in a horizontal LPCVD hotwall reactor commercialized by the Epigress company. The combined use of modeling and experiments allows to identify and to quantify the main growth phenomena. In this paper, a chemistry model including surface deposition and hydrogen etching is first described. It is found that the contribution of the etching of the susceptor to the SiC growth is not negligible. A simple model is used to describe nitrogen incorporation.

Homoepitaxial growth, impurity doping, and diode fabrication on 4H-SiC(11–20) and (03–38) have been investigated. Although the efficiency of nitrogen incorporation is higher on the non-standard faces than on (0001), a low background doping concentration of 2∼3×1014 cm-3 can be achieved. On these faces, boron and aluminum are less effectively incorporated, compared to the growth on off-axis (0001). 4H-SiC(11–20) epilayers are micropipe-free, as expected. More interestingly, almost perfect micropipe closing has been realized in 4H-SiC (03–38) epitaxial growth. Ni/4H-SiC(11–20) and (03–38) Schottky barrier diodes showed promising characteritics of 3.36 kV-24 mΩcm2 and 3.28 kV–22 mΩcm2, respectively. The breakdown voltage of 4H-SiC(03–38) Schottky barrier diodes was significantly improved from 1 kV to above 2.5 kV by micropipe closing.

Amorphous silicon carbides (a-SiC) fabricated by Xe+ ion implantation into 6H-SiC (0001) to fluences of 1015 and 1016/cm2 have been annealed at 850 °C for 1 hour. Transmission electron microscopy (TEM) observations revealed that the 1015 Xe+/cm2 implanted sample was completely recrystallized, while most of the a-SiC remains in the 1016 Xe+/cm2 implanted sample. Pair-distribution function analyses of both of the as-implanted samples show that the peak intensity of Si-C heteronuclear bonds is higher and the peak intensities of Si-Si and C-C homonuclear bonds are lower in the 1015 Xe+/cm2 implanted sample, indicating that the atomistic structure of the 1015 Xe+/cm2 implanted sample is more chemically ordered than that of the 1016 Xe+/cm2 implanted sample. This result suggests that more chemically ordered atomistic structure of 1015 Xe+/cm2 implanted a-SiC leads to complete recrystallization during thermal annealing.

SiC has attracted great interest for high power microwave applications because of its superior intrinsic properties compared to Si and GaAs. Steady demonstrations of increasingly higher power handling capability have been achieved in recent years. However, SiC MESFETs still suffer from significant drain current degradation under RF operation or long-term DC stress. This degradation can be recovered after long periods of relaxation or immediately by illumination under UV light, which is indicative of a trapping effect. The origin of this effect has been attributed to either electron trapping at the device surface between the gate and drain or trapping at the epi-substrate interface due to the presence of electrically active contaminants in the bulk. Newly available “high purity” (non-vanadium compensated) bulk 4H semi-insulating SiC substrates were used in an effort to limit the effect of V-related deep level trapping at the substrate/epilayer interface. To investigate the effect of V on SiC MESFET performance, we compare similar devices fabricated on V compensated, and “high-purity” 4H-SiC substrates without intentional V doping. Presence or absence of V is confirmed by secondary ion mass spectrometry (SIMS) analysis. Pulsed I-V measurements as well as current- and capacitance-based deep level transient spectroscopy (DLTS) measurements were performed to assess trapping activation energy and density. An assessment of device performance and stability for each substrate type is made using RF load-pull measurements and device long-term DC bias stressing at temperature.

Epitaxial growth of 3C-SiC on Si substrates has been studied for many years, however an important issue is how to reduce the high density of interfacial defects. Channel epitaxy is the growth of a film on small channeled windows and is related to selective growth. Channel epitaxy of 3C-SiC grown on the seed 3C-SiC previously deposited on patterned Si substrates was achieved via CVD using hexamethyldisilane (HMDS). The proper selection of mask materials was also key to achieve channel epitaxy. Thermal oxide, silicon nitride and thin SiC masks were tried. Thin SiC was an effective mask to achieve selective growth at 1350°C. Smooth surface morphology was observed on both the channel regions and the mask regions at the growth temperature of 1350°C. Scanning electron microscopy revealed coalescence of the laterally grown regions via channel epitaxial growth of 3C-SiC.

4H-SiC and 6H-SiC thin films as top surface layers of SiCOI wafers and Rutherford Back Scattering experiments with He+ ions in the energy range 0.9 – 2.2 MeV were used for measuring the He+ ions <0001> channeling stopping power with respect to the SiC random one. The film thicknesses were in the range 270–360 nm. The ratio between axial and random stopping power values decreased for increasing energy values and was higher for the 6H polytype with respect to the 4H one, i.e. it ranged from 0.85 to 0.72 for the former and from 0.80 to 0.66 for the latter.

Single crystalline 3C-SiC films have been grown on Si(111) substrate at 1200°C by conventional CVD process using HMDS (Hexamethyldisilane). Before columnar growth of SiC, columnar Si was made by depositing Au on Si(111) substrate as a solvent of VLS mechanism. Si growth was carried out by disproportional reaction in halide transport method. The columnar Si was produced on the patterned substrates. The columnar Si was covered by SiC. Needle like columns of SiC can be used for MEMS application such as micro-heat exchanger.

We report on the integration of ferroelectric Pb(Zr,Ti)O3 (PZT) thin films on 4H-silicon carbide and their electrical properties. The structures of metal-ferroelectric-(insulator)-semiconductor MF(I)S and metal-ferroelectric-metal-insulator-semiconductor MFMIS have been fabricated and characterized. The MFMIS structures of Au/PZT/Pt/Ti/SiO2/SiC have shown fully saturated P-E hysteresis loops with remnant polarization Pr =14.2μC/cm2 and coercive field Ec = 58.9 kV/cm. The MFIS structures exhibited stable capacitance-voltage C-V loops with low conductance (<0.1 mS/cm2, tan d ∼ 0.0007 at 12 V, 400kHz) and memory window as wide as 10 V, when a 5 nm-thick Al2O3 was used as a high bandgap (Eg ∼ 9eV) barrier buffer layer between PZT (Eg ∼ 3.5eV) and SiC (Eg ∼ 3.2eV). Both structures on n- and p- SiC have shown electrical properties promising for the application to the gate stacks for the SiC field-effect transistors (FETs) and the design and process issues on different types of the metal-ferroelectric-silicon carbide field-effect transistors (FETs) have also been proposed.

Spectroscopic studies are reported for cubic SiC grown on Si by chemical vapour deposition (CVD) manufacture technique. The UV excitation room temperature photoluminescence (PL)-Raman spectra exhibited 2.3 eV luminescence line due to RT recombination over the SiC indirect band gap. In addition to the optical phonons from cubic SiC we observed new Raman modes near 620 and 833 cm-1. A comprehensive analysis of the dynamical properties of defects using Green's function theory has suggested isolated impurity vibrations to be the possible origin for the additional phonons observed by Raman spectroscopy.

Al-Ti alloys with 72 wt% Al were employed for the realisation of ohmic contacts on 4×1019 cm-3 p-type ion implanted 4H- and 6H-SiC samples. Contact resistivity characterisations by TLM measurements were done at wafer level in the temperature range 28–290°C. Analysis of the TLM measurements took into account current crowding at the metal pads. More than half of the evaluated contact resistivity reached the minimum value detectable by the used TLM devices, that was slightly higher than 1×10-6 Ωcm2. Above this limit value, contact resistivity decreased for increasing temperature and was spread over a few decades. The maximum contact resistivity at 28°C was 2×10-4 Ωcm2, which changed to 5×10-6 Ωcm2 at 290°C. The thermal behaviour of these TLM structures featured thermionic-field emission conduction.