The current status and next-generation technologies for liquid-crystal displays based on amorphous silicon TFTs are described. Panel size, resolution, design rule, and viewing angle are discussed from the standpoint of panel performance, productivity, and product application. The material properties for future TFT/LCDs are specified based on the discussions of design rule.

High deposition rates and good quality electrical properties and thickness uniformities over large areas are required for all three films (SiNx, a-Si:H and n+ a-Si:H) composing the thin film transistors (TFTs) for the AMLCD industry, while maintaining high tool up-time and low particle formation. Generally these conditions have been achieved for most single-panel multichamber PECVD systems; however, it has become increasingly apparent that a compromise is drawn between the TFT mobility and the deposition rate of the a-Si:H layer. Thus it becomes essential to clearly assess the industry requirements for both deposition rates as well as TFT performance for the different device structures used for AMLCDs, and to discover and control these underlying material properties.

The TEL VHF (40/60 MHz) PECVD system produces high quality, low defect density a- Si:H at deposition rates exceeding 1500 Å/min when analyzed by FTIR, CPM, photo and dark conductivity. Even though the low deposition rate a-Si:H exhibits very similar bulk properties, higher mobility TFTs are produced with a-Si:H deposited at lower RF power. Having both a high ion flux and low ion energy in the SiH4 discharge are likely the most critical conditions for controlling the a-Si:H quality and thus the TFT mobility. Increasing the RF frequency enhances both of these effects, as well as provides a higher deposition rate for a given power density and a higher power threshold for particle/powder formation. For these reasons it is likely a 40/60 MHz plasma will produce better performing TFTs for a given deposition rate when compared with a conventional 13.56 MHz system. Other process conditions such as diluting the SiH4 in H2 or Ar also seem to play an important role in the optoelectronic properties of the a-Si:H film and ultimately the TFT performance.

The surface morphology of 40-MHz PECVD SiNx films is investigated. We report on the correlation between the deposition conditions, bulk properties, and surface roughness of these TFT insulators. The roughness is measured with atomic-force microscopy, AFM. A link will be presented between the AFM properties and the effects of hydrogen dilution during deposition: gas composition and rf-power-density (P) dependences will be discussed. An increase of the surface roughness to 3.7 nm is observed upon H2 dilution and P increase, ascribed to enhanced ion bombardment of the surface during growth.

Conventional high voltage thin-film transistors (HVTFTs) suffer from performance limitations such as low on-current, Vx, shift and large curvature in the linear region of the output characteristics. These limitations are associated with the highly resistive dead region in conventional HVTFT structures. In this paper, we present a novel TFT structure which has a high on-current, improved output characteristics in the linear region, and no Vx shift. The higher on-current and significant improvement in output characteristics allows faster switching. Elimination of the Vx shift leads to more reliable circuit operation. The new structure is based on the conventional low voltage TFT (LVTFT) structure except that it does not suffer from low-voltage breakdown. The low-voltage breakdown of the gate nitride in conventional LVTFTs is perceived to be due to spiking of the drain metallization into the underlying layers which creates regions of very high electric field. In our novel structure, a higher breakdown is achieved by locating the metal contacts away from the gate edge while keeping the necessary drain to gate overlap through a heavily doped microcrystalline layer. Therefore, the new TFT extends the same performance as LVTFTs to high voltage operation. Furthermore, this structure also enhances the yield and reliability by minimizing the common faults in TFTs such as short circuits between gate, source and drain.

We present the first thin film transistors (TFTs) incorporating a low hydrogen content (5 - 9 at.-%) amorphous silicon (a-Si:H) layer deposited by the Hot-Wire Chemical Vapor Deposition (HWCVD) technique. This demonstrates the possibility of utilizing this material in devices. The deposition rate by Hot-Wire CVD is an order of magnitude higher than by Plasma Enhanced CVD. The switching ratio for TFTs based on HWCVD a-Si:H is better than 5 orders of magnitude. The field-effect mobility as determined from the saturation regime of the transfer characteristics is still quite poor. The interface with the gate dielectric needs further optimization. Current crowding effects, however, could be completely eliminated by a H2 plasma treatment of the HW-deposited intrinsic layer. In contrast to the PECVD reference device, the HWCVD device appears to be almost unsensitive to bias voltage stressing. This shows that HW-deposited material might be an approach to much more stable devices.

A novel anodic oxidation method for aluminum thin-film on the glass substrate is proposed for the fabrication of a gate insulator in thin-film transistor (TFT). A proposed rear-positioned cathode makes for much more smooth surface with an average surface roughness of under 4 nm in comparison with conventional cathode positions. The anodic oxidation conditions were comprehensively investigated. The current density, ethylene glycol concentration, and cathode position were chosen as the elements of anodic oxidation condition matrix, and all these conditions affected the film formation. The surface morphology and nanostructure of the anodized films were characterized with an atomic force microscopy (AFM) and cross-sectional transmission electron microscopy (TEM). Films formed at higher ethylene glycol concentrations of over 50% and higher current densities of over 0.9 mA/cm2 exhibited higher breakdown electric fields of over 7 MV/cm, and lower leakage currents. These films had relatively smooth surfaces and took on the shapes of the underlying aluminum. In contrast, films formed at lower ethylene glycol concentrations of under 50% and lower current densities of under 0.9 mA/cm2 had rough surfaces and microvoids. A high concentration of ethylene glycol increases the cost of mass production, however, the proposed rear-positioned cathode method can be achieved even when the concentration of ethylene glycol is under 50%.

Hydrogenated amorphous silicon nitride thin films, prepared in a large area plasma-enhanced chemical vapor (PECVD) deposition system utilizing high-rate deposition technique, have been characterized by various techniques. Experimental data obtained from this study are presented and compared to low-rate deposited PECVD films. Special attention has been devoted during this study to the difference between high- and low-rate deposited samples. The amorphous silicon (a-Si:H) thin-film transistors (TFTs) based on high-rate PECVD materials have been fabricated and characterized. The evaluation of a-Si:H TFTs indicates a good electrical performance which is comparable to its low-rate PECVD materials counterparts.

We deposit hydrogenated amorphous silicon-based thin film transistors using dc reactive magnetron sputtering at a substrate temperature of 125°C, which is low enough to allow the use of plastic substrates. We characterize the structural properties of the a-Si:H channel and a-SiNx:H dielectric layers using infra-red absorption, thermal hydrogen evolution, and refractive index measurements, and evaluate the electrical quality using capacitance-voltage and leakage current measurements. Inverted staggered thin film transistors made with these layers exhibit a field effect mobility of 0.3 cm2/V-s, a Ion/Ioff ratio of 5 × 105, a sub-threshold slope of 0.8 V/decade, and a threshold voltage of 3 V.

In this paper we present a study on the electrical characteristics (conductivity, σ and relative dielectric constant, εr,.) of amorphous silicon nitride (a-SixN1-x) and carbide (a-SixC1-x) films deposited by PECVD, used as dielectric materials in TFT devices, aiming to select the most adequate alloy that lead to improve device performances. Besides that, double stack a-SixN1-x/a-SixC1-x structures were developed and applied as dielectric layers on TFTs, whose performances show to be superior to those ones using single silicon nitride or silicon carbide as dielectric.

We describe the successful fabrication of device-quality a-Si:H thin-film transistors (TFTs) on stainless-steel foil substrates. These TFTs demonstrate that transistor circuits can be made on a flexible, non-breakable substrate. Such circuits could be used in reflective or emissive displays, and in other applications that require rugged macroelectronic circuits.

Two inverted TFT structures have been made, using 200 gim thick stainless steel foils with polished surfaces. In the first structure we used the substrate as the gate and utilized a homemade mask set with very large feature sizes: L = 45 μm; W = 2.5 mm. The second, inverted staggered, structure used a 9500 Å a-SiNx:H passivating/insulating layer deposited on the steel to enable the use of isolated gates. For this structure we used a mask set which is composed of TFTs with much smaller feature sizes. Both TFT structures exhibit transistor action. Current-voltage characterization of the TFTs with the inverted staggered structure shows typical on/off current ratios of 107, leakage currents on the order of 10-12 A, good linear and saturation current behavior, and channel mobilities of 0.5 cm2/V·sec. These characteristics clearly identify the TFTs grown on stainless steel foil as being of device quality.

We fabricated top-gate amorphous silicon thin-film transistors (a-Si:H TFTs) on alkali-free glass foil, for the first time using laser-printed toner for the patterning of each layer. The toner for the first mask level was applied by feeding the glass foil through a laser printer, and for the following mask levels from patterns laser-printed on transfer paper. The transistors have off currents from ˜ 10-12 A to ˜ 10-11 A and on-off current ratios of ˜ 106. Thus we have demonstrated a technology for the patterning of TFT circuits by printing.

We have proposed a new two-dimensional simulation model, which takes into account the density of states of hydrogenated amorphous silicon (a-Si:H) and temperature-dependence of the source/drain series resistances (Rs), to explain the dependence of the activation energy (Eact) of drain-source current (IDs) on gate-source bias (VGs) in a-Si:H thin-film transistors (TFTs). We found that the influence of series resistance cannot be ignored, else an overestimated Eact will result. The results of our simulation are in agreement with experimentally observed saturation of the Eact at higher VGs.

The off current behavior of hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs) with an atmospheric pressure chemical vapor deposition (APCVD) silicon dioxide (SiO2) gate insulator were investigated at negative gate voltages. The a-Si:H TFT with SiO2 gate insulator has small off currents and large activation energy (Ea) of the off current compared to the a-Si:H TFT with SiNx gate insulator. The holes induced in the channel by negative gate voltage seem to be trapped in the defect states near the a-Si:H/SiO2 interface. The interface state density in the lower half of the band gap of a-Si:H/SiO2 appears to be much higher than that for a-Si:H/SiNx.

We have examined the material properties and operation of bottom-gate amorphous silicon thin film transistors (TFTs) using temperature measurements of the subthreshold current. From the derivative of current activation energy with respect to gate bias, we have deduced information about the density of states for several different transistor types. We have demonstrated that, in TFTs with thin active layers and top nitride passivation, the current conduction channel moves from the gate insulator interface to the passivation insulator interface as the transistor switches off. Our 2D simulations clarify these experimental results. We have examined the effect of bias stress on the transistors and analyzed the resulting reduction in the subthreshold slope. Based on these results, we have extended our analytic amorphous silicon TFI SPICE model to include the effect of bias stress.

Two novel characterization techniques for hydrogenated silicon thin films have been recently proposed which show promise in providing critical feedback for evaluating materials and monitoring the device fabrication process. The first technique is the optical interference spectroscopy for a quick non-destructive measurement of absorption coefficient and refractive index spectra of amorphous- and poly-Si thin films in a wide range of the incident photon energies (0.5–3.5 eV) [1]. By using this technique, the absorption related to defects in the subgap energy region has been determined for device quality thin films. The second technique is the novel version of the field effect conductivity (FEC) method for the direct density-of-states (DOS) determination from analysis of thin film transistor (TFT) quasi-static transfer characteristics [2]. This sensitive, fast, and easy to use, method makes it possible to resolve fine-scale features in the midgap DOS of a-Si:H. In this work, data from two methods of spectroscopy are analyzed together. Very close correlation of results is demonstrated which provides a unique opportunity to identify midgap defect states and to understand the fundamental physics of hydrogenated silicon films. The energy map of defect states in the upper half of a-Si:H bandgap is presented. These results permits to use TFT transfer characteristics and optical interference technique measurements as effective tools to control the quality of TFF manufacturing process.

The electrical conductivity of nc-Si films grown from SiF4 and H2 with constant arsenic doping rises from 10-5 to 10 Scm-1 as the thickness rises from ˜ 0.1 to 1 μm. This variation demonstrates the strong influence of film structure on conductivity. We show that the conductivity of undoped nc-Si films of constant thickness can be varied by adding SiH4 to the SiF4 and H2 source gas.

PECVD silicon nitride was deposited by silane and deuterium ammonia. Silicon rich and nitrogen rich silicon nitride were deposited by varying the ratio of the SiH4/DH3. From FTIR, we found that the wave numbers of SiD and ND shifted lower when compared to SiH and NH bond in the NH3 nitride. In Si-rich nitride, both Si-H and Si-D bonds were found, which is different from N-rich nitride, where only an ND bond was found. Most of the hydrogen in NH(D) comes from the ammonia during PECVD deposition. We found that some of the deuterium exchanges its bonding to silicon from the initial bonding to nitrogen during a rapid thermal annealing process.

The laser annealing effects on the TEOS (Tetra-Ethyl-Ortho-Silicate) oxide of MOS (Al/TEOS/n+ Silicon ) structures was investigated with different initial oxide conditions, such as breakdown field. The breakdown field increased upto the 170 mJ/cm2 with increasing laser energy density and decreased at 220 mJ/cm2. It is considered that the increase of breakdown field is originated from the restore of strains which exist mainly at the metal/oxide interface.

The material properties of laser-annealed a-Si:Nx films were investigated. The a-Si:Nx films for laser-annealing were deposited by rf plasma enhanced chemical vapor deposition (PECVD) with NH3 and SiH4 gas mixtures. At the 0.35 of NH3/SiH4 ratio, the optical band-gap was abruptly increased to 2.82 eV from 2.05 eV by laser-annealing which indicates that Si-N bonding comes to be notable at that ratio. The electrical conductivity showed the maximum value of 4× 10-6 S/cm at the 0.11 of NH3/SiH4 ratio where the grain growth and the increase of Si-N bonding are optimized for the enhancement of electrical conductivity. The σP/σD ratio which is related to the defects states for photo generation centers was decreased with increasing NH 3/SiH 4 ratio. Our experimental data showed that the optical band gap and electrical conductivity of laserannealed a-Si:Nx films were dominantly affected by the NH3/SiH4 ratio at the 250 mJ/cm2 of laser-annealing energy density.

In this paper, we essentially discuss the material aspects of low temperature (≤ 600 °C) polysilicon technologies. Emphasis is put on the properties of polysilicon films, depending on the way they are obtained. Solid phase crystallisation as well as pulsed laser crystallisation processes are presented in some detail, together with thin film transistor characteristics. Although not yet stabilised and despite uniformity and reproducibility problems, laser crystallisation will probably end up being the technology of choice for the manufacture of large area electronics products, because it allows the fabrication of devices exhibiting superior properties, with a reduced thermal budget.