Conductive atomic-force microscopy (C-AFM) writing is attracting attention as a technique for clarifying the switching mechanism of resistive random-access memory (ReRAM) by providing a wide area filled with filaments, which can be regarded as one filament with large radius. We observed a C-AFM writing area of NiO films using SEM, and revealed a correlation between the contrast in a secondary electron image (SEI) and the resistance written by C-AFM. In addition, the dependence of the SEI contrast on the beam accelerating voltage (Vaccel) suggests that the resistance-change effect occurs near the surface of the NiO film. As for the effect of electron irradiation on the C-AFM writing area, it was shown that the resistance change effect was caused by exchanging oxygen with the atmosphere at the surface of the NiO film. This result suggests that the low resistance and high resistance areas are, respectively, p-type Ni1+δO (δ < 0) and insulating (stoichiometric) or n-type Ni1+δO (δ ≥ 0).

The nanocrystalline ITO embedded Zr-doped HfO2 high-k dielectric thin film has been made into MOS capacitors for nonvolatile memory studies. The devices showed large charge storage densities, large memory windows, and long charge retention times. In this paper, authors investigated the temperature effect on the charge transport and reliability of this kind of device in the range of 25°C to 125°C. The memory window increased with the increase of the temperature. The temperature influenced the trap and detrap of not only the deeply-trapped but also the loosely-trapped charges. The device lost its charge retention capability with the increase of the temperature. The Schottky emission relationship fitted the device in the positive gate voltage region. However, the Frenkel-Poole mechanism was suitable in the negative gate voltage region.

In this study an electroforming free device structure based on 25nm thin TiO2 thin films is presented. The TiO2 films are deposited on CMOS compatible W plugs. The use of 5nm thick interlayers of Ti and W between the TiO2 and the Pt electrode turn out to be the key step to achieve the forming free performance. In these Pt/Ti/TiO2/W or Pt/W/TiO2/W samples the switching polarity can be repeatedly changed from “eightwise” to “counter-eightwise” in one device by a proper adjustment of the I-V measurement conditions. The most simple explanation for this observation is that the switching interface can be flipped back and forth from the bottom to the top electrode.

Planar NAND technology is rapidly approaching its fundamental limits and will likely transition to a three dimensional structure. The scaling challenges facing NAND will be reviewed. Emerging memory technologies, such as the cross-point, will be discussed. The materials challenges facing emerging memories will be reviewed.

Resistance switching in metal – insulator - metal (MIM) structures with transition metal oxides as the insulator material is a promising concept for upcoming non-volatile memories. The electronic properties of transition metal oxides can be tailored in a wide range by doping and external fields. In this study SrTiO3 single crystals are subjected to high temperature vacuum annealing. The vacuum annealing introduces oxygen vacancies, which act as donor centers. MIM stacks are produced by physical vapor deposition of Au and Ti contacts on the front and rear face of the SrTiO3 crystal. The time dependent forming of the MIM stacks under an external voltage is investigated for crystals with varying bulk conductivities. For continued formation, the resistivity increases up to failure of the system where no current can be measured anymore and switching becomes impossible.

We have investigated the interfacial contact properties of the CMOS compatible electrode materials W, TiW, Ta, TaN and TiN to doped-Sb2Te phase change material (PCM). This interface is characterized both in the amorphous and in the crystalline state of the doped-Sb2Te. The electrical nature of the interface is characterized by contact resistance measurements and is expressed in terms of specific interfacial contact resistance (ρC). These measurements are performed on four-terminal Kelvin Resistor test structures. Knowledge of the ρC is useful for selection of the electrode in the integration and optimization of the phase change memory cells.

Flash type electronic memories are the preferred format in code storage at complex programs running on fast processors and larger media files in portable electronics due to fast write/read operations, long rewrite life, high density and low cost of fabrication. Scaling limitations of top-down fabrication approaches can be overcome in next generation flash memories by replacing continuous floating gate with array of nanocrystals. Germanium (Ge) is a good candidate for nanocrystal based flash memories due its small band gap. In this work, we present effect of silicon dioxide (SiO2) host matrix density on Ge nanocrystals morphology. Low density Ge+SiO2 layers are deposited between high density SiO2 layers by using off-angle magnetron sputter deposition. After high temperature post-annealing, faceted and elongated Ge nanocrystals formation is observed in low density layers. Effects of Ge concentration and annealing temperature on nanocrystal morphology and mean size were investigated by using transmission electron microscopy. Positive correlation between stress development and nanocrystal size is observed at Raman spectroscopy measurements. We concluded that non-uniform stress distribution on nanocrystals during growth is responsible from faceted and elongated nanocrystal morphology.

Non-Volatile Memories (NVM) integrating silicon nanodots (noted SDs) are considered as an emerging solution to extend Flash memories downscaling. In this alternative memory technology, silicon nanocrystals act as discrete traps for injected charges.

Si-dots were grown by Low Pressure Chemical Vapor Deposition (LPCVD) on top of tunnel oxide. Depending on the pre-growth surface treatment, tunnel oxide surface may present either siloxane or silanol groups. SDs deposition relies on a 2–steps process: nucleation by SiH4 and selective growth with SiH2Cl2.

In a context of technological industrialization, it is of primary importance to develop in-line metrology tools dedicated to Si-dots growth process control. Hence, silicon-dots were observed in top view by using an in-line Critical Dimension Scanning Electron Microscopy CDSEM and their average size and density were extracted from image processing. In addition, Haze measurement, generally used for bare silicon surface characterization, was customized to quantify Si-dots deposition uniformity over the wafer. Finally, Haze value was correlated to Si nanodots density and size determined by CDSEM.

In this study, novel Si2Sb2Te6 phase change material is investigated in detail for the phase change memory application using transmission electron microscopy and X-ray photoelectron spectroscopy. The phenomenon that Te diffuses to the film surface during phase switching and successively evaporates out has been confirmed. The phase change memory cells employing Si2Sb2Te6 and Si3Sb2Te3 materials are fabricated and programmed. For the Si2Sb2Te6-based cell a data endurance of 5×105 cycles is achieved with a failure mode resembling reset stuck, which can be attributed to the migration of Tellurium during the operation cycles. It means that a thermally stable material system of SixSb2Te3 is preferred for the PCM applications.

In this report, we studied the role of the oxygen concentration in TiOx layer of Ni/TiOx/TiO2/Ni stack based 2-terminal resistive random access memory (RRAM) devices. The sample with oxygen deficient TiOx layer showed Schottky diode type J-V characteristics in the as-fabricated state while the sample with higher oxygen content in TiOx demonstrated MIM or back-to-back connected diode behavior. The Capacitance-Voltage (C-V) profiling was performed and doping density vs. depletion width characteristic was obtained. The conductance technique was implemented to study the interface state density. The RRAM type switching behavior of these samples was studied. The sample with high oxygen in TiOx showed filament based switching after electroforming while the sample with low oxygen in TiOx showed switching governed by the charge trapping.

The retention time of the resistive state is a key parameter that characterizes the possible utilization of the RRAM devices as a non – volatile memory device. The understanding of the mechanism of the time relaxation process of the information state may be essential to improve their performances. In this study we examine RRAM devices based on metal / YBCO interfaces in order to comprehend the physics beneath the resistive switching phenomenon.

Our experimental results show that after producing the switching of the resistance from a low to a high state, or vice versa, the resistance evolves to its previous state in a small but noticeable percentage. We have measured long relaxation effects on the resistance state of devices composed by metal (Au, Pt) / ceramic YBCO interfaces in the temperature range 77 K – 300 K. This time relaxation can be described by a stretched exponential law that is characterized by a power exponent n = 0.5, which is temperature independent, and by a relaxation time τ that increases with increasing the temperature. These characteristics point out to a non-thermally assisted diffusion process that could be associated with oxygen (or vacancy) migration and that produces the growth of a conducting (or insulating) fractal structure.

Metal-insulator-metal (MIM) resistive switching devices are being pursued for a number of applications, including non-volatile memory and high density/low power computing. Reported resistive switching devices vary greatly in the choice of metal oxide and electrode material. Importantly, the choice of both the metal oxide and electrode material can have significant impact on device performance, their ability to switch, and the mode of switching (unipolar, bipolar, nonpolar) that results. In this study, three metal oxides (Cu2O, HfOx, and TiOx) were deposited onto copper bottom electrodes (BEs). Four different top electrode (TE) materials (Ni, Au, Al, and Pt) were then fabricated on the various metal oxides to form MIM structures. Devices were then characterized electrically to determine switching performance and behavior. Our results show that the metal TE plays a large role in determining whether or not the MIM structure will switch resistively and what mode of switching (unipolar, bipolar, or non-polar) is observed.

Sub-micrometer ferroelectric-gate field-effect transistors (FeFETs) of 0.56 μm and 0.50 μm gate lengths were successfully fabricated for Fe-NAND cells. Gate stacks of the FeFETs were Pt/SrBi2Ta2O9(SBT)/Hf-Al-O/Si. The gate stacks were formed by electron beam lithography and inductively coupled plasma reactive ion etching (ICP-RIE). Ti and SiO2 hard masks were used for the 0.56 μm- and 0.50 μm-gate FeFETs, respectively, in the ICP-RIE process. Steep SBT sidewalls with the angle of 85° were obtained by using the SiO2 hard masks while 76° sidewalls were shown using Ti hard masks. All fabricated FeFETs showed good electrical characteristics. Drain current hysteresis showed larger memory windows than 0.95 V when the gate voltages were swung between 1±5 V. The FeFETs showed stable endurance behaviors over 108 program/erase cycles. Drain current retention properties of the FeFETs were good so that the drain current on/off ratios did not show practical changes after 3 days.

This work addresses non-volatile memories based on metal-oxide polymer diodes. We make a thorough investigation into the static and dynamic behavior. Current-voltage characteristics with varying voltage ramp speed demonstrate that the internal capacitive double-layer structure inhibits the switching at high ramp rates (typical 1000 V/s). This behavior is explained in terms of an equivalent circuit.

It is also reported that there is not a particular threshold voltage to induce switching. Voltages below a particular threshold can still induce switching when applied for a long period of time. The time to switch is longer the lower is the applied voltage and follows an exponential behavior. This suggests that for a switching event to occur a certain amount of charge is required.

Hafnium oxide-based resistive memory devices have been fabricated on copper bottom electrodes. The HfOx active layers in these devices were deposited by atomic layer deposition at 250 °C with tetrakis(dimethylamido)hafnium(IV) as the metal precursor and an O2 plasma as the reactant. Depth profiles of the HfOx by x-ray photoelectron spectroscopy and secondary ion mass spectroscopy revealed a copper concentration on the order of five atomic percent throughout the HfOx film. This phenomenon has not been previously reported in resistive switching literature and therefore may have gone unnoticed by other investigators. The MIM structures fabricated from the HfOx exhibited non-polar behavior, independent of the top metal electrode (Ni, Pt, Al, Au). These results are analogous to the non-polar switching behavior observed by Yang et al. [2] for intentionally Cu-doped HfOx resistive memory devices. The distinguishing characteristic of the material structure produced in this research is that the copper concentration increases to 60 % in a conducting surface copper oxide layer ~20 nm thick. Lastly, the results from both sweep- and pulse-mode current-voltage measurements are presented and preliminary work on fabricating sub-100 nm devices is summarized.

In this report, the fabrication and electrical characterization of fully vertically integrated complementary resistive switches (CRS), which consist of two anti-serially connected Cu-SiO2 memristive elements, is presented. The resulting CRS cells are initialized by a simple procedure and show high uniformity of resistance states afterwards. Furthermore, the CRS cells show high switching speeds below 50 ns, making them excellent building blocks for next generation non-volatile memory based on passive nanocrossbar arrays.

We report on the use of La2O3 (LO) as a capping layer for ferroelectric-gate thin-film transistors (FGTs) with solution-processed indium-tin-oxide (ITO) channel and Pb(Zr,Ti)O3 (PZT) gate insulator. The fabricated FGT exhibited excellent performance with a high “ON/OFF” current ratio (ION/IOFF) and a large memory window (∆Vth) of about 108 and 3.5 V, respectively. Additionally, a significantly improved data retention time (more than 16 hours) as compared to the ITO/PZT structure was also obtained as a result of good interface properties between the ITO channel and LO/PZT stacked gate insulator. We suggest that the LO capping layer acts as a barrier to prevent the interdiffusion and provides atomically flat ITO/LO/PZT interface. This all-oxide FGT device is very promising for future ferroelectric memories.

This work presents an enhancement of nonvolatile floating gate memory (NFGM) devices comprised of AgInSbTe (AIST) nanocomposite as the charge-storage trap layer and HfO2 or HfO2/SiO2 as the blocking oxide layer. A significantly large memory window (ΔVFB) shift = 30.7 V and storage charge density = 2.3×1013 cm−2 at ±23V gate voltage sweep were achieved in HfO2/SiO2/AIST sample. Retention time analysis observed a ΔVFB shift about 19.3 V and the charge loss about 13.4% in such a sample under the ±15V gate voltage stress after 104 sec retention time test. Regardless of applied bias direction, the sample containing HfO2/SiO2 layer exhibited the leakage current density as low as 150 nA/cm2 as revealed by the current-voltage (I-V) measurement. This effectively suppresses the electron injection between gate electrode and charge trapping layer and leads to a substantial enhancement of NFGM characteristics.

Resistive switching properties of silver nanoparticles hosted in an insulating polymer matrix (poly(N-vinyl-2-pyrrolidone) are reported. Planar devices structures using interdigitated gold electrodes were fabricated. These devices have on/off resistance ratio as high as 103 , retention times reaching to months and good endurance cycles. Temperature-dependent measurements show that the charge transport is weakly thermal activated (73 meV) for both states suggesting that nanoparticles will not aggregate into a metallic filament.