(Er, Si) co-doped GaN thin films were grown on Si substrates by molecular beam epitaxy (MBE) technique. Electroluminescent devices (ELDs) were fabricated and the effect of Si co-doping on the performance of GaN devices was studied. Previous results with GaN:Er ELDs reported that electroluminescence (EL) was much stronger in reverse bias than in forward bias condition, indicating that the dominant factor in EL intensity was the electric field. The results reported here show the first time GaN:Er ELDs where forward bias EL is very much larger, indicating that the dominant factor is forward bias current. The electrical properties of (Si, Er) co-doped GaN thin films are believed to be responsible for the current control mechanism.

High dose hydrogen implantation-induced blistering phenomena in GaN and AlN have been investigated for potential thin film layer transfer applications. GaN and AlN were implanted with 100 keV H2+ ions with various ion doses in the range of 5´1016 to 2.5´1017 cm−2. After implantation the samples were annealed at higher temperatures up to 800°C in order to observe the formation of surface blisters. In the case of GaN only those samples that were implanted with a dose of 1.3´1017 cm−2 or higher showed surface blistering after post-implantation annealing. For AlN the samples those were implanted with a dose of 1.0´1017 or 1.5´1017 cm−2 displayed surface blistering after post-implantation annealing. Cross-sectional transmission electron microscopy was utilized to observe the microscopic defects that eventually cause surface blistering. Large area microcracks, as revealed in the XTEM images, were clearly observed in the case of both GaN and AlN after post-implantation annealing. A comparison of the hydrogen implantation-induced blistering in GaN and AlN has also been presented.

The insertion of an AlN interlayer for tensile strain relief in GaN thin films grown on Si (111) on-axis and vicinal substrates by nitrogen rf plasma source molecular beam epitaxy has been investigated. The 15 nm AlN interlayer was inserted between the bottom 0.5 micron GaN layer and the top 1.0 micron GaN layer. The interlayer was very effective to reduce the tensile stress in the overall 1.5 micron GaN/Si film to the level required for complete avoidance of microcracks, which were present in high densities in GaN/Si heterostructures grown without an AlN interlayer. The strain of the AlN interlayer, as well as the strain in all the layers of the entire GaN/Si heterostructure was analyzed by x-ray diffraction (XRD) and transmission electron microscopy (TEM) measurements. Reciprocal space map in XRD indicated that the 15 nm AlN interlayer was coherently strained with the GaN films. However TEM observations revealed that the AlN interlayer was partially relaxed in local regions. The AlN interlayer was also observed to interfere with the GaN growth process. In particular, above morphological features such as V-defects, GaN was overgrown with a large density of threading dislocations and inversion domain boundaries.

Spectral imaging cathodoluminescence and micro-Raman spectroscopy studies of GaAs layers grown on Si substrates by the conformal method allow to reveal a great variety of physical features of the layers, such as the complete stress distribution, self-doping effects, or the incorporation of dopants. We present herein the characterization of GaAs conformal layers grown by hydride vapor phase epitaxy, where the main issues concerning the distribution of defects and stresses are revealed. Also, intentionally doped layers were analyzed, revealing the main aspects of the incorporation of dopant impurities during growth.

GaN film grown on Si substrate with AlN/AlxGa1−xN buffer is studied by low pressure metal organic chemical vapor deposition (MOCVD) method. The AlxGa1−xN film with Al composition varying from 0∼ 0.66 was used. The correlation of the Al composition in the AlxGa1−xN film with the stress of the GaN film grown was studied using high resolution X-ray diffraction including symmetrical and asymmetrical ω/2θscans and reciprocal space maps. It is found that with proper design of the Al composition in the AlxGa1−xN buffer layer, crack-free GaN films can be successfully grown on Si (111) substrates using AlN and AlxGa1−xN buffer layers.

The influence of growth temperature on oxygen incorporation into GaN epitaxial layers was studied. GaN layers deposited at low temperatures were characterized by much higher oxygen concentration than those deposited at high temperature typically used for epitaxial growth. GaN buffer layers (HT GaN) about 1 μm thick were deposited on GaN nucleation layers (NL) with various thicknesses. The influence of NL thickness on crystalline quality and oxygen concentration of HT GaN layers were studied using RBS and SIMS. With increasing thickness of NL the crystalline quality of GaN buffer layers deteriorates and the oxygen concentration increases. It was observed that oxygen atoms incorporated at low temperature in NL diffuse into GaN buffer layer during high temperature growth as a consequence GaN NL is the source for unintentional oxygen doping.

During the last ten years, we have developed an efficient growth process of nitrides on silicon substrates by molecular beam epitaxy. In collaboration with partners AlGaN/GaN HEMTs on Si having promising performances have been fabricated. Focusing on the growth aspect and underlying some of the key issues, we present in this paper an overview of our contribution in the field of AlGaN/GaN HEMTs on Si substrates.

We develop an analytical model for the Direct-Current (DC) and capacitance-voltage (CV) characteristics of AlGaN/GaN High Electron Mobility Transistors (HEMTs), providing accurate predictions of the transconductance and the gate capacitance in both linear and velocity saturation regions. The models provide an accurate and smooth connection in the area near the knee point for the DC characteristics, which is attributed to precise descriptions of the channel charge. An accurate model for the low-field mobility of the two dimensional electron gases (2DEG) has been developed, considering the nonmonotonic dependence of the carrier velocity on the electric field perpendicular to the channel for the first time. The calculated transconductance and output conductance are proved accurate and to have high order continuity, especially in large voltage biases, which is hard for some other analytical or numeral models. The gate capacitance has been obtained analytically and verified by experimental data. The slight decrease in the measured gate-to-source capacitance over the velocity saturation region which indicates the results of neutralization of donors and the contribution of the free electron in the AlGaN layer has been modeled accurately and smoothly for the first time. The predicted cut-off frequency is in excellent agreements with measured data over the full range of applied biases. The models are implemented into the HSPICE simulator for the DC, AC and transient simulations, with good speed and convergence characteristics.

High-dielectric constant (high-κ) oxide growth on hexagonal-GaN (on sapphire) is examined for potential use in enhancement-mode metal oxide semiconductor field effect transistor (MOSFET). Enhancement-mode MOSFET devices (ns > 4×1013 cm−2) offer significant performance advantages, such as greater efficiency and scalability, as compared to heterojunction field effect transistor (HFET) devices for use in high power and high frequency GaN-based devices. High leakage current and current collapse at high drive conditions suggests that the use of a high-κ insulating layer is principle for enhancement-mode MOSFET development. In this work, rare earth oxides (Sc, La, etc.) are explored due to their ideal combination of permittivity and high band gap energy. However, a substantial lattice mismatch (9-21%) between the rare earth oxides and the GaN substrate results in mid-gap defect state densities and growth dislocations. The epitaxial growth of the rare earth oxides by molecular beam epitaxy (MBE) on native oxide passivated-GaN is examined in an effort to minimize these growth related defects and other growth-related limitations. Growth of the oxide on GaN is characterized analytically by RHEED, XRD, and XPS. Preliminary MOS electrical analysis of a 50 Å La2O3 on GaN shows superior leakage performance as compared to significantly thicker Si3N4 dielectric.

To meet increasingly challenging and complex systems requirements, it is not enough to use one single semiconductor technology but to integrate several high performance technologies in an efficient and cost effective way. Heterogeneous integration (HI) approaches lead to a significant higher design flexibility and performance. In this paper we present some of the HI approaches that are being used and developed at Northrop Grumman Space Technology (NGST) that include selective epitaxial growth, metamorphic growth and wafer level packaging (WLP) technology. More recently we are developing a scaled and selective wafer packaging technique to integrate III-V semiconductors with silicon under the COSMOS DARPA program.

The defect structure of the GaN film grown on sapphire by plasma-assisted molecular beam epitaxy (PAMBE) technique was found to be dependent on the AlN buffer layer growth temperature. This buffer growth temperature controlled the defect density in GaN film but had shown contrary effects on the density of screw threading dislocation (TD) and edge TD. The density of screw TD was high on lower temperature buffer but low on the higher temperature buffer. Meanwhile the density of edge TD had shown the opposite. Further examinations have suggested that the defect structure was closely related to the stress in the GaN film, which can be controlled by the growth temperature of the AlN buffer. Using the 525°C AlN buffer, optimum quality GaN film with relatively low screw and edge TDs were achieved.

The interpretation of ECCI images in the forescattered geometry presents a more complex diffraction configuration than that encountered in the backscattered geometry. Determining the Kikuchi line that is the primary source of image intensity often requires more than simple inspection of the electron-channeling pattern. This problem can be addressed, however, by comparing recorded ECCI images of threading screw dislocations in 4H-SiC with simulated images. An ECCI image of this dislocation is found to give the orientation of the dominant Kikuchi line, greatly simplifying the determination of the diffraction simulation. In addition, computed images of threading screw dislocations in 4H-SiC were found to exhibit channeling contrast essentially identical to that obtained experimentally by ECCI and allowing determination of the dislocation Burgers vector.

Multiple ion-implanted GaN/AlGaN/GaN high electron-mobility transistors (HEMTs) and preciously controlled ion-implanted resistors integrated on silicon substrate are reported. Using ion implantation into source/drain (S/D) regions, the performances were significantly improved. On-resistance reduced from 10.3 to 3.5 Ω•mm. Saturation drain current and maximum transconductance increased from 390 to 650 mA/mm and from 130 to 230 mS/mm. Measured transfer curve shows that I/O gain of 4.5 can be obtained at Vdd = 10 V.

AlGaN/GaN HEMT's were grown on 6″ Si <111> substrates and passivated using IMEC's in-situ SiN technique. The epitaxial growth was optimized to minimize RF losses due to the substrate-nitride interface while at the same time maintaining high buffer resistivity and low trap density.

To assess RF losses of the epitaxial layer structure, coplanar waveguides were defined on places of the wafer where the top in-situ SiN and AlGaN has been etched away. The attenuation of the RF signals on the coplanar waveguides remained below 0.3dB/mm for frequencies up to 6GHz.

The processing of HEMT's included mesa etching, the formation of TiAlMoAu ohmic contacts, 500nm long gates with source-connected field plates and an airbridge process. The gate fingers are 250µm wide, yielding a total gate periphery of 1.5mm for 6-finger devices and 5mm for the 20-finger version.

The devices' RF power performance was characterised on-wafer. To avoid damage to the RF-probes, active load-pull measurements were performed in pulsed mode with a 100µs period under 10% and 30% duty cycle respectively. As there was no difference between the performance using different duty cycles, we conclude that the channel temperature reaches steady-state in less than 10µs.

The 6-finger devices were operated in deep class AB operation mode but showed clear self-biasing effects. The bias voltage was changed from 30V to 60V in 10V increments. Under 60V bias, the devices provide an output power density of 7.9W/mm at 2GHZ with a PAE of 46% and 6.3W/mm at 4GHz with a PAE of 41%. The output power scales linearly with the bias voltage ranging from 30V to 60V, showing that there is no drain lag in the devices. We attribute this to the efficient surface passivation with the in-situ Si3N4 as well as to high crystal quality and hence the low trap density of the buffer layers. At 2GHz, the linear and saturated power gain are 22dB and 16.4dB respectively. An interesting observation is that the maximum gate current, even at power density levels of 7.9W/mm, remains below 50µA/mm which should prove beneficial for reliability.

The larger 20-finger devices of 5mm total gate periphery reach a maximum absolute output power of 20W at a bias of 40V which represents the limit of our on-wafer measurement system.

These results prove that the use of large area Si substrates is the only viable route forward for AlGaN/GaN HEMT's.

In this report, we have demonstrated enhancement-mode n-channel GaN MOSFETs on silicon (111) substrates. We observe a high field-effect mobility of 115 cm2/Vs, the best report for GaN MOSFET fabricated on a silicon substrate to our knowledge. The threshold voltage was estimated to be +2.7 V, and the maximum operation current was over 3.5 A. This value is the largest which have ever been reports.

We report a novel chemical vapor deposition (CVD) process for epitaxial growth of Ge film on GaAs substrate. The resultant layer exhibits device level quality, as shown by high-resolution transmission electron microscopy (HRTEM), Raman spectroscopy, high-resolution X-ray diffraction (HRXRD). In addition, atomic force microscopy (AFM) scanning indicates low RMS surface roughness of 5 Å. Secondary ion mass spectrometry (SIMS) reveals negligible out-diffusion of Ga and As into the Ge epilayer. By employing silane passivation, Ge p-MOSFET with TaN/HfO2 gate stack was fabricated on Ge/GaAs heterostructure for the first time, showing excellent output and pinch-off characteristics. A GaAs channel n-MOSFET was also fabricated, using similar SiH4 treatment during gate stack formation. These results reveal a potential solution to integrate Ge p-channel and GaAs n-channel MOSFET for advanced CMOS applications.

In the COSMOS program, HRL Laboratories, LLC. is developing technology for intimate integration of CMOS devices with 400 GHz InP HBTs to form complex integrated circuits. This research is investigating innovative approaches to the transistor-scale integration of compound semiconductor and silicon-based transistors so as to enable revolutionary advances in science, devices, circuits, and systems.

Deep level electron traps in n-GaN grown by metal organic vapor phase epitaxy (MOVPE) on Si (111) substrate were studied by means of deep level transient spectroscopy (DLTS). The growth of n-GaN on different pair number of AlN/GaN superlattice buffer layers (SLS) system and on c-face sapphire substrate are compared. Three deep electron traps labeled E4 (0.7-0.8 eV), E5 (1.0-1.1 eV), were observed in n-GaN on Si substrate. And the concentrations of these traps observed for n-GaN on Si are very different from that on sapphire substrate. E4 is the dominant of these levels for n-GaN on Si substrate, and it behaves like point-defect due to based on the analysis by electron capture kinetics, in spite of having high dislocation density of the order of 1010 cm−3.

GaN layers were grown on c-plane sapphire substrates by using a conventional two step growth method via metal organic chemical vapor deposition (MOCVD). The effect of different growth conditions used in the deposition of the low temperature nucleation layer and high temperature islands on the crystalline quality of the GaN layers was investigated by high resolution X-ray diffraction (HRXRD) and transmission electron microscopy (TEM). The polar (tilt) and azimuthal (twist) spread were estimated from the full width at half maximum (FWHM) values of the omega rocking curves (¥ø-RCs) recorded from the planes parallel and perpendicular to the sample surface. It was found from the XRD and TEM study that the edge and mixed type threading dislocations are dominant defects so that the relevant figure of merit (FOM) for the crystalline quality should be considered only by the FWHM value of ¥ø-RC of the surface perpendicular plane. The result showed that the mixed- and edge-types dislocations were strongly associated with the growth conditions used in the deposition of the nucleation layer and high temperature islands.

In this work, we report on the growth of ultraviolet (UV) AlGaN/GaN multiple quantum wells (MQWs) structure using atomic layer deposition (ALD) technique. The AlGaN/GaN MQW sample grown on the sapphire substrate consisted of three GaN QWs and four AlGaN barriers comprised AlN/GaN superlattices (SLs). The root-mean-square value of the surface morphology was only 0.35 nm observed from the atomic force microscope image and no crack was found on the surface. Both of the high resolution X-ray diffraction curves and transmission electron microscope images showed sharp interfaces between SLs layers and QWs with good periodicity. These results demonstrate that the ALD could be a very useful technique for controlling the crystalline quality and thickness of the III-nitride epilayer.