A review of basic concepts in electromigration is presented and recent theoretical developments are discussed. The microscopic origin of the driving force for electromigration is elucidated and, as an example, the driving force exerted on an impurity near a grain boundary is calculated in a jellium model. A connection is made between the calculated electromigration driving force and 1/f-noise measurements. Results of the first computer simulations of electromigration at the microscopic level are presented. It is found that dynamical recoil effects can lead to a significant enhancement of electromigration for light interstitial impurities.

A new electromigration test structure has been designed and fabricated which allows statistical characterization of current-induced open failures at vias, under varying current flow geometries. Results for a 2-level Al-Cu metallization system with W-filled 1.0 μm vias reveal no differences in via lifetimes for parallel, anti-parallel, or perpendicular current flows. However, a factor of 7 improvement in the total average via resistance produces an order of magnitude improvement in lifetimes. Line reliability remains superior to the reliability of the vias, indicating that the vias are the “weak links” in the system.

A model for evaluating temperature and current density effects which incorporates the atomic flux equation has been developed and used to make reliability predictions for extrapolations to operating conditions. The model suggests that the median time to failure of a 2-level ietal structure with an average via resistance of two ohms will be 2.7×1017 hours for operating conditions of 2×105 A/cm2 and 125°C.

Pure aluminum films are deposited under a variety of conditions to vary the crystallographic texture. After patterning and annealing at 400°C for 1 hour, electromigration tests are performed at several temperatures. Failure data are compared on the basis of t50 and standard deviation. Microstructure is quantified by transmission electron microscopy for grain size and grain size distribution and by X-ray diffraction for texture. A strong (111) texture significantly improves the electromigration lifetime and decreases the standard deviation in time to failure. This improvement correlates with both the fraction and sharpness of the (111) texture component.

A new statistical model for electromigration failure in fine-line thin film conductors is developed in [1] by extending [2] to incorporate the statistics of microstructure and concomitant variations in the activation energy for grain boundary diffusion. The resulting distribution of time t to failure is well-approximated by

where N is the number of line segments that are potential independent failure elements, 1μ and σ are, respectively, the mean and standard deviation of an assumed normal distribution of activation energy in grain boundaries, γ is a scaling constant, T is in degrees Kelvin, j is the current density in the line, p1 is the fraction of line segments for which exactly one grain boundary occurs between two blocking boundaries, and Φ is the standard normal cumulative distribution function. (Note: .)

This paper reviews the experimentally established relationship between electromigration and mechanical stress in thin films. A model will be described which calculates the development of stress around sites of electromigration flux divergence in a metallisation track and it is shown how the model can be used to predict the time before electromigration damage occurs. The effect of passivation on the stress state within a metal track is discussed and the behaviour of metallisation under pulsed current testing is interpreted in terms of mechanical stress generation and relaxation.

The role of mechanical stress in electromigration failure morphology and time to failure is discussed theoretically. It is seen that a tensile stress can accelerate failure significantly and that accelerations from test conditions are also a function of applied stress.

Interconnect reliability is of continuing concern in modem VLSI circuits. This work presents analyses of the microstructural detail in electromigration-induced damage in Al and Al-Cu unpassivated interconnects. Such failure analysis is crucial for the characterization of the fundamental processes responsible for failure. Results, via TEM, SEM and focussed-ion beam techniques, suggest possible second phase precipitate-void growth interactions, show slit-like open circuit failures in narrow interconnects, and illustrate the microstructures of hillocks and whiskers formed during accelerated electromigration testing. These results are discussed in terms of existing models for electromigration failure processes and lifetimes. The results are further intended to suggest mechanisms for future modelling and to direct the design of more reliable interconnect material systems.

Electromigration in Al-1.5%Cu interconnects was studied using a direct current (d.c.) induced 1/f2 noise spectrum. The interconnects were fabricated with a multi-step sputter deposition process, with deposition temperatures of 25°C, 300° C, and 475°C. The resulting microstructures were analyzed using SEM and TEM, and grain size distribution parameters were measured. The minimum temperature at which 1/f2 noise could be detected was found to depend on the deposition temperature; for the 25°C, 300°C, and 475°C depositions the lowest temperature at which 1/f2 noise could be measured was 190°C, 220°C, and 265°C, respectively. The activation energy of 1/f2 noise was measured and compared with the electromigration activation energy. The noise activation energy was found to depend on deposition temperature; 0.56 eV, 0.64 eV, and 0.96 eV for the 25°C, 300°C, and 475° C depositions, respectively. SEM analysis of the samples after measurement show initial stages of void and hillock formation. Corresponding electromigration activation energies, 0.56 eV, 0.69 eV, and 1.04 eV were also dependent on deposition temperature. Noise measurements of interconnects made prior to electromigration testing were highly correlated with the electromigration failure times.

The electromigration resistance, the sub-micron contact area filling capability, the crystal structure, the preferred orientation, and the CMOS device characteristics of self-ion-enhanced physical vapor deposited aluminum metallizations have been studied. It has been found that optimal conditions can be achieved by increasing the deposition rate and by applying some ionization and acceleration of the aluminum particles.

This work investigates the reliability issues associated with an aluminum sputter process, called the Al-plug process, that results in the complete filling of submicron contacts and vias of various sizes. The state-of-the-art Al-plug technology has proven its superiority over conventional processes due to its process simplicity and complete elimination of metal step-coverage problems and dielectric voiding over contacts/vias, resulting in higher reliability. Materials and electrical characterization of this metal process are presented.

Electromigration characteristics of Al lines under pulsed current stressing at frequencies 50–200 MHz were measured. Lifetime was found to depend explicitly on both current on-time and current off period. Lifetime increases with t-off as t50 ∝ (t-off)2.2 and decreases with t-on as t50 ∝ (t-on)−0.7. The data indicate no threshold frequency for drastic change in lifetime. Lifetime was also found to increase with duty cycle as t50 ∝ r−2.7, which is a remarkable improvement over an average current density model.

A sputtered aluminum-low copper (Cu concentration < 2wt.%Cu), multilayered, submicron, device interconnect metallurgy consisting of two TiAl3 layers (∼,0.1μm thick) under and over an Al-Cu alloy conductor (0.95μm thick) with either an Al-Cu or TiN cap layer (0.05μm thick) has been developed. These films were patterned by reactive ion etching, and showed both a low susceptibility to corrosion and a low resistivity. Electromigration lifetime data on Al, Al-Cu, and both dc magnetron sputtered and electron gun evaporated multilayered fine lines, fabricated and tested in the same laboratory, are included for a direct comparison. Outstanding electromigration behavior was measured for sputtered, multilayered, submicron films with copper concentrations between 0.12 – 2wt.%Cu. In contrast, electromigration lifetimes of evaporated, multilayered films were found to degrade rapidly at < 2wt.%Cu. This anomalous electromigration behavior was attributed to structural differences in the Ti-Al intermetallics formed. It is proposed that defects present in the Ti-Al superlattice phase cause decreased electromigration performance compared to films in which TiAl3 exclusively forms. Multilevel structures, consisting of CVD W interlevel vias, were also investigated and found to have significantly degraded electromigration performance compared to planar samples. This was attributed to geometric and material flux divergences at the via/conductor interfaces.

The electromigration drift velocity of Al in Al(3wt.% Si), Al(2wt.%Cu), and Al(2wt.%Cu,3wt.%Si) was measured in a temperature range 133 to 220 °C with current densities of 1.0 to 1.5×106A/cm2. In Al(3wt.% Si), a significant Al depletion at the cathode end and accumulation at the anode end of stripe were observed within a few hours at 1.5×106A/cm2 and 200°C. In addition, local hillocks and voids along the metal lines were observed. For Al(Cu,Si), the Al drift velocity was slowed down by Cu addition. The majority of hillocks started to grow at a distance about 6 μm away from the cathode end with current density of 1.5×106 A/cm2. The drift velocity of Al in Al(Cu,Si) was found to be a function of time starting with an initial low value and increasing to a an final steady-state value. The behavior was attributed to the migration of Cu and dissolution of Al2Cu precipitates. The activation energies of the depletion 3 Aμm of Al(2%,Cu, 3%Si) was determined to be 0.90±02 eV. The dissolution and growth of A12Cu in the tested samples of Ti/Al(2%Cu)/Ti/TiN were observed using the scanning electron microscope and an electron microprobe.

Electromigration-induced failure was investigated in Al/Cu/Si conductor stripes deposited over trenches cut into an oxide layer and compared with those deposited onto flat areas. The results indicate a reduction in lifetime which is proportional to the size of the step to be covered and this reduction is in excess of what is expected from simple current density scaling. In addition, the electromigration performance of conductors deposited over topology did not correlate well with the performance on flat structures.

The effect of shallow (< 500 Å) implanted ions on the formation of thermal hillocks in thin (5000 Å) patterned Al9 9w%Si1w%, films was studied. The ions were implanted by plasma immersion ion implantation (PIII) and the gases (N2, O2, and Ar) used in the implantation ranged from completely inert to highly reactive with Al. The voltages used to accelerate the ionized molecules were 2.5 kV to 30 kV. This corresponds to implant depths of 50 Å to 400 Å. The nominal doses were adjusted to achieve a ∼20% dopant concentration over the fullwidth- at-half-maximum of the calculated implant profile. Following implant, the samples were sintered at 450°C for 30 minutes and inspected for thermal hillock formation by scanning electron microscopy. We find that PIII is effective in suppressing thermal hillock formation for implant depths greater than 60 Å.

Electromigration damage is one of the primary causes of the failure of interconnects in VLSI circuits. In this work, the response of Cu films to electromigration stress has been studied by an isothermal electrical resistance method. Accurate temperature measurement and control of Cu stripes stressed at elevated temperatures and high current densities were accomplished by use of a thin film thermistor. The activation energy and current density exponent were measured for vacuum evaporated Cu films and the values that were obtained are 0.79±0.02eV and 3.6±0.2, respectively. Scanning electron micrographs of stripes that underwent electromigration damage showed many voids in the cathode region, hillocks in the anode region, and both voids and hillocks in the rest of the stripe. The activation energies of two aluminum stripes were also measured by the same method. An average value of 0.54±0.02eV was obtained.

In-situ transmission electron microscope (TEM) electromigration damage (EMD) tests were performed on pure Al films which were thermally evaporated onto oxidized silicon wafers under different deposition conditions. Three different aluminum alloy films, Al-2wt%Cu, Al-8wt%Cu, and Al-2wt%Cu-lwt%Si were also examined. TEM images were recorded photographically and by a video camcorder. The sample stripes were stressed by a high DC current density (≈1.5 MA/cm2). A linear temperature ramp (5°C/min) was supplied by an external, computer controlled heater. The morphology of EMD-induced voids was found to be strongly dependent on microstructure. In small grain size Al stripes, EMD occurred by the formation of void “fingers” which propagated in an almost random manner. In large grain size Al and Al alloy stripes, the EMD-elongated voids propagated approximately parallel to each other and along the field direction. They were preceded with clearly identifiable local thinning. The thinned regions often had crystallographic edges. Contrary to the commonly held belief that EMD occurs only by a grain boundary diffusion mechanism, the present study clearly shows that surface or interface diffusion was the dominant, latter stage EMD failure mode in large grain size films.

The yield strength of metallic thin films bonded to hard substrates can be significantly higher than is customary for bulk samples of the same metal. This is related to the constrained nature of the deformation. The constrained deformation, as well as the commonly observed crystallographic texture of thin films, places restrictive conditions on the mechanisms of deformation that produce stress relaxation. In narrow aluminum based metallizations used as interconnects in large scale integrated circuits thermal stress induced voiding provides an effective means for stress relaxation. For these interconnects, the stress state is tensile after excursions to higher temperatures; the stresses relax mainly by dislocation glide and grain boundary sliding during the cooldown, while the longer term relaxation is governed by stress-induced voiding and dislocation creep.

The stress induced failure of passivated aluminum based metallizations is the combined result of the stress induced void nucleation and growth of voids. The present work investigates the dependence of the void nucleation on aging temperature and cooling rate. Narrow Al, Al(0.2%Cu) and Al(2%Si) lines of different widths were fabricated by lift-off and passivated with various thicknesses of Si3N4. After a 400°C anneal, the specimens were cooled directly to the selected aging temperature and aged for up to 1100 hours. Void nucleation was found to occur predominantly during the initial cool-down. The rate of nucleation varied in quite different ways with the combination of aging temperature and cooling rate for the different alloys, which is consistent with a grain boundary sliding controlled nucleation mechanism.

The stress induced growth of individual voids in passivated Al-lines at room temperature was monitored in-situ, without removing the passivation. The kinetics was strongly influenced by variations in line geometry, even over distances of many μm, indicating variations in the stress relaxation as well.