Hydrogenated amorphous silicon (a-Si:H) and hydrogenated microcrystalline silicon ( c-Si:H) double-junction solar cells were deposited on a large-area substrate using a RF glow discharge technique at various rates. The thickness uniformity for both a-Si:H and c-Si:H is well within ± 10% and the reproducibility is very good. Preliminary results from the large-area a-Si:H/m c-Si:H double-junction structures show an initial aperture-area efficiency of 11.8% and 11.3%, respectively, for 45 cm2 and 461 cm2 size un-encapsulated solar cells. The 11.3% cell became 10.6% after encapsulation and stabilized at 9.5% after prolonged light soaking under 100 mW/cm2 of white light at 50°C. High rate deposition of the c-Si:H layer in the bottom cell was made using the high-pressure approach. An initial active-area (0.25 cm2) efficiency of 11.3% was achieved using an a-Si:H/m c-Si:H double-junction structure with 50 minutes of c-Si:H deposition time.

The poly-Si film was deposited by using the metal-induced growth (MIG) method on tungsten substrates. By making Au/n-Si Schottky photo-diodes, doping density effect was studied by using three different doping level Si sputtering targets. Increasing the Si target resistivities from 0.02Ω-cm to 50Ω-cm, open-circuit-voltage (Voc) decreased from 0.22V to 0.14V while short-circuit-current density (Jsc) increased from 1.55mA/cm2 to 2.42mA/cm2. C-V results revealed a high charge density in the device, which may be due to the oxygen thermal donor effects. Using an oxygen filter for the sputtering gas effectively reduced the charge densities and increased the Jsc value. The p/n junction solar cells were fabricated by using ion implantation at 1013∼1014cm−2 dose and 100∼200keV. The cells with wider emitter layer by double-ion implantation gave higher Jsc and Voc values. Passivation of the Si film by using hydrogenation improved the Jsc, Voc and spectral response of the solar cells.

Recently, hot-wire deposited microcrystalline silicon has attracted increasing attention. The use of hot-wire deposited intrinsic μc-Si:H for high efficiency solar cells was demonstrated by Klein et al. [1]. Integration of high-quality intrinsic μc-Si:H into all-hot-wire nip solar cells, prepared close to the transition to amorphous growth using a tantalum catalyzer, resulted in initial and stable efficiencies of 5.4 % on simple stainless steel substrates [2]. However, the deposition rates for the absorber material in both cases remained low, at values around 1 Å/s.

In the present study we report on the dependence of deposition rate and material quality on the design and area of the tantalum catalyzer. It was found that different filament geometries require considerable changes in certain deposition conditions to optimize material properties. So, for example, enlarging the catalyzer surface made it necessary to decrease the hydrogen dilution of the process gas, in order to obtain the desired microcrystalline material close to the phase transition. These changes might be understood in terms of alterations of the gas decomposition relations on the catalyzer surface. For these modified conditions, deposition rates in the range of 2.5-10 Å/s could be achieved for μc-Si:H due to the fact that a higher silane fraction of the process gas could be used. For different wire geometries, the optimized intrinsic layers were incorporated into solar cells. Using a catalyzer with modified geometry and enlarged surface area, conversion efficiencies of ν = 4.4 % could be achieved for all-μc-Si:H, all-HWCVD solar cells at a rate of about 3 Å/s.

We use in-situ real-time spectroscopic ellipsometry to observe the breakdown of silicon epitaxy during growth by hot-wire chemical vapor deposition (HWCVD) on Si (100) substrates. Representative data is presented for the two types of epitaxy breakdown that we have observed: 1) an immediate transition to hydrogenated amorphous silicon (a-Si:H), and 2) a slower transition where a-Si:H cones nucleate and grow until they eclipse further epitaxial growth. Simple models, consistent with transmission-electron and atomic-force micrographs, describe the evolution of both types of breakdown showing that real-time spectroscopic ellipsometry is a useful tool for monitoring the growth of epitaxial silicon.

The growth of poly-Si films on glass substrates using an in-situ aluminum-induced crystallization (AIC) process above the Si-Al eutectic temperature of 577°C is discussed. Silicon films were deposited by Hot-Wire Chemical Vapor Deposition (HW-CVD) onto Al coated Corning 7059 glass substrates. The back surface coverage and the average grain size of the films were compared as a function of growth rate and the Si/Al thickness ratio. SEM and EDS analysis of samples with a Si/Al ratio of 1 revealed two domains in the films which varied in morphology and composition; rougher areas containing a mixture of Si and Al with Al content up to 35%, and relatively smoother areas composed of almost entirely Si. This non-uniform morphology seems to be the result of the absence of a native oxide layer when a liquid phase is formed during the deposition. Si grains as large as 50 m m in diameter and back surface coverage up to 90% were obtained for both the Si/Al ratios of 1 and 5. However, no continuous Si films were obtained. The sample with a Si/Al ratio of 1 had columnar grains reaching to the film surface, whereas on the Si/Al ratio of 5 large Si grains did not extend to the film surface.

We report on the use of coplanar transient photoconductivity and post-transit time-of-flight spectroscopy techniques in the study of carrier transport in microcrystalline silicon films prepared over a range of crystallinities. Coplanar samples are susceptible to post-deposition oxidation and reversible adsorption of atmospheric gases, which may alter the apparent density of states. Coplanar measurements suggest lower deep defect densities in more highly crystalline films, but this is due at least in part to an increased occupancy of these states. A comparison of results obtained using both techniques suggests anisotropic transport, with reduced band tailing (greater structural order) along the direction of film growth, a larger defect concentration around the column boundaries, and a higher defect density within the amorphous tissue than in optimised single-component amorphous silicon films.

Nanocrystalline silicon (nc-Si) based p-i-n solar cells were fabricated onto various substrates using modified pulsed PECVD technique. Dark J-V characteristics of nc-Si p-i-n solar cells were found to depend strongly on the substrates and are studied at different i-layer thickness and varying the p/i interface structures. In this work, we report an almost constant diode quality factor (n = 1.2 – 1.3) up to the thickness of 3.8 μm for the devices grown on “suitably textured” ZnO substrates. The rather insensitive variation of n with i-layer thickness suggests that the dark J-V characteristics are not dominated by bulk recombination for the devices grown on textured ZnO, which prevents grain collision in the i-layer. In contrast to that, a significant change of n (1.8 – 1.3) was found while changing the p/i interface using various duration of H2 plasma treatment of nc-p surface (ST). The p/i interface structure in nc-Si p-i-n device plays the crucial role either by changing the p/i interface defects or the film structure at p/i interface determines the quality of subsequently grown nc-i layer and hence the whole device performance.

Hydrogenated microcrystalline silicon (m c-Si:H) solar cells with different thicknesses were deposited on specular stainless steel substrates and on textured Ag/ZnO back reflectors using RF and modified very high frequency glow discharge at various deposition rates. Raman spectra and X-ray diffraction patterns exhibit a significant increase of microcrystalline volume fraction and in grain size with film thickness. Atomic force microscopy reveals an increase in the size of microstructural features and the surface roughness with increasing thickness. Based on these results, we believe that the increase of the microcrystalline phase with thickness is the main reason for the deterioration of cell performance with the thickness of the intrinsic layer. To overcome this problem, we have developed a procedure of varying the hydrogen dilution ratio during deposition. Using this method, we have been successful in controlling the microstructure evolution and achieved an initial active-area efficiency of 8.4% for a c-Si:H single-junction solar cell, and 13.6% for an a-Si:H/a-SiGe:H/m c-Si:H triple-junction solar cell.

A probabilistic model to predict the statistical distribution of grain boundaries in the thin-film transistor (TFT) with an arbitrary transistor-to-grain size ratio is proposed in this paper. Performance of the TFTs, such as carrier mobility, can be estimated and the corresponding performance variation of the fabricated devices becomes predictable when the statistical distribution of grain boundaries is known. The proposed model is still applicable even when the transistor size becomes comparable to the grain size. Reliability and accuracy of the modeling results have been extensively verified by experimental data. It is believed that the model can provide design and optimization guidelines of device variation for grain-enhanced polysilicon TFT technology.

Recent work has shown that the electrical properties of hydrogenated amorphous Si films with nanocrystalline inclusions (a/nc-Si:H) make this material a promising candidate for applications in solar cells. The present study applies the technique of spherical aberration-corrected high-resolution transmission electron microscopy for the identification and analysis of the crystalline content of an a/nc-Si:H film. By varying both the spherical aberration of the objective lens and the defocus, regions of crystallinity in the a/nc-Si:H film can be identified. This study reports the analysis of Si nanoparticles of approximately 1.5 nm in size. Some of these nanoparticles contain planar defects, such as twin defects and stacking faults. All particles observed were the same crystal structure as bulk Si, which agrees with theoretical cluster calculations. Beam damage was observed in the amorphous matrix for long electron–beam exposures.

We incorporate narrow-gap amorphous silicon germanium (a-SiGe:H) alloys grown by hot-wire chemical vapor deposition (HWCVD) into single-junction n-i-p solar cells, and improve both fill factor (FF) and open-circuit voltage (Voc) by bandgap grading. The Tauc bandgap (ET) of the a-SiGe:H is as low as about 1.25 eV. Previously [1], we obtained a short-circuit current density (Jsc) up to 20 mA/cm2 in an n-i-p device incorporating an ungraded 120-nm i-layer of 1.25-eV a-SiGe:H. However, without buffer layers or bandgap profiling, the fill factor was only 38%, likely due to an abrupt bandgap transition and poor hole collection. To overcome these problems, we have used composition bandgap profiling throughout the i-layer and improved both Voc and FF significantly without any Jsc loss. The solar cell efficiency is improved from 3.55% to 5.85% and Voc rises from 0.475 to 0.550 eV. This improved single-junction a-SiGe:H solar cell has a quantum efficiency of about 48% at l=800 nm and about 15% at l=900 nm. We present details of the bandgap profiling and its effect on device performance.

Computer simulations of single-junction hydrogenated amorphous silicon (a-Si:H) solar cells with different thickness of the intrinsic layer were carried out in order to study the role of charge gap states in their light-induced degradation. It is demonstrated that it is the decrease of positively charged states above midgap, Dh, and the increase of neutral states around midgap,Dz, and negatively charged states below midgap, De in the intrinsic layer that result in a drop of performance of the solar cells due to light soaking. These changes in the gap states are in accordance with our recent experimental results from the charge deep-level transient spectroscopy on undoped a-Si:H. The experimentally observed changes in the dark and illuminated J-V curves and spectral response could not be simulated with the same set of input parameters by only increasing the defect-state density in the intrinsic layer.

Undoped and n+ hydrogenated microcrystalline silicon (μc-Si:H) films for thin film transistors (TFTs) were deposited at a temperature of 250°C with 99 ∼ 99.6 % hydrogen dilution of silane by standard 13.56 MHz plasma enhanced chemical vapor deposition (PECVD). High crystallinity m c-Si:H films were achieved at 99.6 % hydrogen dilution and at low rf power. An undoped 80 nm thick m c-Si:H film showed a dark conductivity of the order of 10−7 S/cm, the photosensitivity of an order of 102, and a crystalline volume fraction of 80 %. However, a 60 nm thick n+ μc-Si:H film deposited using a seed layer showed a high dark conductivity of 35 S/cm and a crystalline volume fraction of 60 %. Using n+ μc-Si:H films as drain and source contact layers in a-Si:H TFTs provides substantial performance improvement over n+ a-Si:H contacts. Finally, fully μ c-Si:H TFTs incorporating intrinsic m c-Si:H films as channel layers and n+ μc-Si:H films as contact layers have been fabricated and characterized. These TFTs exhibit a low threshold voltage and a field effect mobility of 0.85 cm2/Vs, and are far more stable under gate bias stress than a-Si:H TFTs.

Image and particle sensors based on thin-film on CMOS technology are currently being developed at our laboratory. In this technology, amorphous silicon detectors are vertically integrated on top of dedicated CMOS chips. For both, vision and particle detection, this approach is expected to enhance the performances. In fact very high fill factors, increased sensitivity, and integration level, coupled with extremely low dark current density values can potentially be attained.

A first optimization of the a-Si:H diodes (>1mm2) on glass substrates, with the primary focus on reducing dark current densities, gave Jdark values as low as 1 pA/cm2 (at -1 V for 1 m thick detectors). These detectors were then deposited on CMOS readout chips, but so far this step was unfortunately accompanied by an increase in Jdark to values over 10 nA/cm2.

Here, the possible cause for such an increase in Jdark as well as possible “remedies” against this effect will be discussed; the principle cause is supposed to be the influence of chip topology. Possible solutions include surface treatments as well as the use of metal-i-p diode configuration. Results obtained so far with these methods are given.

The scaling behavior of the roughness evolution of silicon nitride (a-SiNx:H) films with different mass densities (deposited from SiH4-N2-H2 and SiH4-NH3 based plasmas) has been investigated by atomic force microscopy and real time spectroscopic ellipsometry. The observed roughness exponent a is similar for both films, whereas the growth exponent b is a factor of two smaller for the higher density films. The relation between the lower value of b and the higher mass density is discussed.

Initial interaction of a magnetron sputter deposited Al(100 nm, {111} fibre textured)/Si(150 nm, amorphous) bilayer, induced by isothermally annealing at 523 K for 60 min in a vacuum of 2.0×10−4 Pa, was studied by X-ray diffraction, Auger electron microscopy and focused-ion beam imaging techniques. Upon annealing, the crystalline Si had grown into the grain boundaries of the Al layer with a {111} texture, a crystallite size of approximate 12 nm and a tensile stress of +138 MPa. Simultaneously, the Al grains had grown into the Si layer from the original interface of the a-Si and Al sublayers with the lateral grain growth. The stress parallel to the surface of the Al layer had changed from +27 MPa to +232 MPa after annealing.

The fabrication of low temperature polycrystalline silicon with lifetimes close to single crystalline silicon, but with internal surface passivation similar to that observed in deposited microcrystalline silicon, is a promising direction for thin film polycrystalline silicon photovoltaics. To achieve this, large grains with passivated grain boundaries and intragranular defects are required. We investigate the low-temperature (250-550°C) epitaxial growth of thin silicon films by hot-wire chemical vapor deposition (HWCVD) on Si(100) substrates and large-grained polycrystalline silicon template layers formed by selective nucleation and solid phase epitaxy (SNSPE). Using reflection high energy electron diffraction (RHEED) and transmission electron microscopy (TEM), we have observed epitaxial, twinned epitaxial, mixed epitaxial/polycrystalline and polycrystalline phases in the 50 nm–15 μm thickness regime. HWCVD growth on Si(100) was performed using a mixture of diluted silane (4% in He) and hydrogen at a H2/SiH4 ratio of 50:1 at substrate temperatures from 300–475°C. We will discuss the relationship between the microstructure and photoconductive decay lifetimes of these undoped layers on Si(100) and SNSPE templates as well as their suitability for use in thin-film photovoltaic applications.

Hot Wire Chemical Vapor Deposition (HWCVD) is shown to be a fast method for the deposition of protocrystalline silicon films from undiluted silane. Intrinsic silicon-hydrogen films (2 μm thick) have been deposited by HWCVD on plain stainless steel as well as on stainless steel precoated with a n-type doped microcrystalline silicon layer. In X-ray diffraction experiments, the linewidths of the first sharp peak (FSP) were 5.59 ± 0.09 degrees and 5.29 ± 0.11 degrees, respectively, indicating improved medium-range order and a template effect due to the μc-Si:H n-layer. For thinner layers (0.7 μm thick), the linewidths of the FSP were 5.29 ± 0.09 degrees and 5.10 ± 0.09 degrees. These FSPs are as narrow as for optimized i-layers made by H2-diluted plasma deposition, however, at a much higher deposition rate (1 nm/s), at moderate temperature (250°C), and without the use of H2 dilution. In accompanying transmission electron micro-graphs, the layers show a significant concentration of elongated small voids in the growth direction that are not interconnected. Small Angle X-ray Scattering (SAXS) results are consistent with these observations. We suspect that the void nature allows the bulk of the film to be more ordered. The utilization of such layers in n-i- p solar cells on plain stainless steel leads to cells with a remarkably good stability, showing a decrease of the fill factor of less than 10 % during 1500 h of light soaking.

We have used the modified very-high-frequency glow discharge technique to deposit hydrogenated microcrystalline silicon (m c-Si:H) solar cells at high rates for use as the bottom cell in a multi-junction structure. We have investigated c-Si:H single-junction, a-Si:H/ c-Si:H double-junction, and a-Si:H/a-SiGe:H/m c-Si:H triple-junction solar cells and achieved initial active area efficiencies of 7.7%, 12.5%, and 12.4%, respectively. Issues related to improving material properties and device structures are addressed. By taking advantage of a lower degradation in m c-Si:H than a-Si:H and a-SiGe:H alloys, we have minimized the light induced effect in multi-junction structures by designing a bottom-cell-limited current mismatching. As a result, we have obtained a stable active-area cell efficiency of 11.2% with an a-Si:H/a-SiGe:H/μ c-Si:H triple-junction structure.

We report on the growth and fabrication of top gate thin film transistors at low temperatures in nanocrystalline Si:H. The nanocrystalline Si:H was deposited using a VHF-PECVD plasma process at 45 MHz in a diode reactor. The material was deposited from a mixture of silane and hydrogen at a temperature of 250-300°C. Higher temperatures resulted in a loss of hydrogen from the material. The properties of the nanocrystalline Si:H were studied using x-ray diffraction and Raman spectroscopy. The material showed a high ratio (3.8) between the crystalline and amorphous peaks in the Raman spectrum. X-ray diffraction data showed the films to be predominantly oriented in <111> direction, and the grain size estimated from Scherer's formula was in the range of 12-15 nm. The doping of the material could be changed by introducing ppm levels of Boron or Phosphorus. The as-grown material was generally n type. By adding controlled amounts of B, the material could be made p type. The devices made were n-channel MISFET's with p body. The n+ source and drain layers were made from amorphous Si:H. A systematic investigation of the appropriate oxide/nitride layer to be used was undertaken. The nitride layers were grown at 250-300°C using mixtures of silane and ammonia, with a high degree of dilution by helium. The presence of helium dilution, along with post-deposition passivation by a hydrogen plasma, was found to produce reproducible, low interface defect density nitride materials. Interface state densities were measured using capacitance spectroscopy at different frequencies and temperatures and found to be in the range of 4.5x1011/cm2-eV. The breakdown strength of the nitride was measured and found to be 4 MV/cm. Proof-of-concept TFT devices were fabricated using reactive ion etching. The threshold voltage was in the range of 13-15 V, and the on/off ratio was in the range of 103.