Underfill delamination is one of the most common failure mechanisms for the Direct Chip Attach (DCA) assemblies. This paper, based on finite element and analytical analysis of stress concentrations, proposes the possible delamination trends of the underfill in the DCA assembly. The results explain well the recent experimental observations. The analysis suggests that good adhesion between underfill and solder joints might help compensate for the relatively poor adhesion of the underfill/passivation interfaces. It also suggests that voids in the underfill material may sometimes be detrimental.

The Cr‐CrCu‐Cu metal scheme, as a terminal multistructure metallization for flip chip applications, has been investigated utilizing PVD sputter deposition varying the conditions of deposition power and temperature, and film thickness. A modified Controlled Collapse Chip Connection (C4) process was utilized in order to evaluate the aforementioned deposition of the Cr‐CrCu‐Cu multilayers and the effect of film microstructure on the parameters of shear strength and thermal cycle reliability. Thermal cycle reliability results proved to be a function of both the CrCu alloy and the Cu overlayer thickness. Transmission electron microscopy (TEM) cross‐sections of the Cr‐CrCu‐Cu multilayers suggests that the columnar grain structure of the CrCu layer may provide a sacrificial thermal diffusion barrier between the PbSn alloy solder balls and the Al bond pads during the thermal‐cycle tests.

A new underfill was developed for a flip chip application with a large VLSI die. The new underfill is resistant to hydrolysis, exhibits a significantly lower moisture saturation level than widely used carboxylic anhydride cured underfills, demonstrates superb penetration capability between such a large die and an organic substrate without void formation, and delivers excellent adhesion characteristics and reliability performance during temperature cycling test and PCT (pressure cooker test).

The new underfill utilizes amine catalyzed ring opening polymerization of epoxides, forms ether linkages during cure rather than ester linkages which anhydride cured underfills form, and strongly resists to hydrolysis. The underfill is less sensitive to moisture contamination and provides improved floor life as well as storage life in contrast to anhydride cured underfills as well. Unique low stress performance and penetration capability of the underfill are attributed to the use of proprietary silicone modified epoxy resin as well as highly loaded filler of optimized size, shape and size distribution in reference to the gap between a die and an organic substrate.

An optimum cure schedule and a desirable viscosity range have also been identified for the new underfill to minimize filler segregation. Proper preheating of a die‐substrate has effectively reduced void formation while facilitating the removal of volatile from an organic substrate.

In reacting eutectic SnPb solder with Ti/Cu and Cr/Cu/Au thin film metallization on Si wafers, we have observed spalling of Cu6Sn5 spheroids when the solder consumes the Cu. The formation of the spheroids is assisted by the ripening reaction among the compound grains. In addition we have observed an asymmetric spalling phenomenon using a sandwich structure, in which two wafers were soldered face-to-face. The spalling occurs predominantly at the interface below the solder joint. It suggests that gravity plays a role.

Diffusion in both the Pd‐Sn and Cu‐Sn systems has been investigated using differential scanning calorimetry. Averaged interdiffusion coefficients for the PdSn4, PdSn2 and Cu3Sn intermetallics have been calculated, where equilibrium concentrations in the diffusion couples are assumed. There is an obvious hierarchy within the Pd‐Sn system where diffusion is fastest in the most Sn‐rich intermetallic. Comparisons within each system, including consideration of the solute diffusion coefficients in pure Sn, provide evidence that in the most Sn rich phase (e.g. PdSn4) the interstitial diffusion of metal atoms is the dominant reaction mechanism. In contrast, the diffusion coefficient for the Cu‐rich phase Cu3Sn was found to be five orders of magnitude smaller than the solute diffusion coefficient for Cu in pure Sn.

A thin film laminated high density multilayer wiring board was developed using electroless copper plating technology. The basic steps in the fabrication process are: laminating the high heat resistant polymer film, forming via holes by plasma etching and filling them by electroless copper metallization. The 25 μm diameter via holes can be completely filled with copper using the selective electroless plating method. This paper describes the fabrication process, focusing particularly on electroless copper plating.

Selective electroless metallisation for electronic interconnect applications requires the selective activation of insulating substrate surfaces prior to plating. Photoselective activation has emerged as a solution with significant potential to minimise the number of activation process steps. This paper reports a photoselective activation process using ultraviolet excimer lamps to decompose a proprietary palladium‐based ultraviolet‐sensitive photochemical coating. The morphology of the photochemical coating, irradiation process conditions for decomposition to produce palladium metal activation sites, the morphology of the coating and activation, and the adhesion of electroless copper on coarse grain 96% alumina ceramic are reported. Copper feature resolution of better than 50 μm is demonstrated. The process is demonstrated to require photochemical solution concentrations an order of magnitude lower than reported palladium acetate activation processes.

Heat spreader characteristics of single layer and multilayer diamond composite substrates are determined by bonding to electronic device wafers. Preparation of diamond substrates, metallization and bonding procedures to device wafers are described. Infrared microscopy imaging of the bonded device wafers is used to determine the heat spreading characteristics. Advantages associated with multilayer diamond composite heat spreaders are discussed.

Rapid advances in high power electronics packaging require the development of new heat sink materials. Advanced composites designed to provide thermal expansion control as well as improved thermal conductivity have the potential to provide benefits in the removal of excess heat from electronic devices. Carbon-carbon (C-C) composits are under consideration for several military and space electronic applications including SEM-E electronic boxes. The high cost of C-C composits has greatly hindered their wide spread commercialization. A new manufacturing process has been developed to produce high thermal conductivity (over 400 W/mK) C-C composites at greatly reduced cost (less than $50/lb). This new material has potential applications as both a heat sink and a substrate. Dielectric coatings such as A1N and diamond were applied to this new type of heat sink material. Processing, as well as mechanical and thermal properties of this new class of heat sink material will be presented.

In low pin-count packages mounted with a device for portable electronics equipment, we have developed the CSP(Chip Size Package), which guarantees the reliability similar to the former SSOP (Shrink Small Outline Package) despite its drastic miniaturization in size than SSOP. The BCC (Bump Chip Carrier) we developed this time, as the name suggests, is a package with bumps, having the following structure: resin bumps covered with metal film are laid out in the base peripherally as mounted terminals. This resin bump can be formed by molding monolithically with resin sealing, and the connection between the bump and metal film has been implemented using lead frame manufacturing technology and etching technology we have developed. In this paper, we outline the structure and manufacturing technology of BCC as well as the results of reliability evaluation for BCC.

Underfill encapsulants, used in direct‐chip‐attachment (DCA) packaging of electronics, consist of an epoxy resin in which a high concentration of solid particles are suspended. As a fluid mixture key features of these encapsulants are their relatively large particle sizes and large particle‐to‐liquid density ratios (ρs/ρ0 ?2.4). Experiments have been conducted to characterize the flow behavior of model mixtures of negatively buoyant, spherical particles suspended in Newtonian liquids. Capillary flow in a parallel surface channel is used to simulate the underfill flow process. The effects of varying the channel spacing, particle size and liquid carrier are reported here. The flow behavior is contrasted with a linear fluid, effective viscosity model. Particle settling appears to be linked to the more complex behavior observed in both our model suspensions and measurements using an actual commercial encapsulant.

Electron-beam (e-beam) moiré is a recently developed technique for micro-mechanics. It allows one to combine the resolution of the scanning electron microscope (SEM) with the strain measurement capabilities of moiré. With e-beam moiré we are able to study locally the effect of temperatures ranging between −50 and 150 °C on conductive adhesives (CAs) and their interfaces. With this technique we measured the local displacements due to the thermal expansion of the copper and the CA. The modified lap-shear specimens were made of copper-to-copper attached with CAs and cured according to the manufacturer's instructions. A cross section of each material was polished and a moiré grating was written on the surface using e-beam lithography techniques. Digital images of the moiré were collected from the SEM at regular temperature intervals. The images were compared and the displacements measured. Local regions of large displacements were observed in the paste specimen. Permanent deformations in the film specimen resulted from exceeding the glass transition temperature of the CA.

A fine-pitch ( less than 100 micro-meter pads pitch ) aluminum pad flip chip assembly technology for use with the built-up Printed Wiring Boards (PWB) has been developed and named “Lead-Less-Chip Assembly (LLC Assembly)” technology. Our newly developed technology consists of three points: Forming gold-ball-bumps on the aluminum pads of the bare LSI chip by a wire ball bonding method. Solder-coating on the copper pads of the built-up PWB using Micro Punching technology or the Super-Juffit technology. Flux-less solder bonding the bare chip onto the PWB with a nitrogen atmosphere.

A reliability evaluation performed on a single chip and multi chip modules assembled using this LLC Assembly technology with test chips and real C-MOS devices showed a high level of endurance. We have applied this technology to Multichip modules (MCMs) for Note Personal Computers and portable terminals.

The present study is directed to a new foamed elastomer composition for supporting the interconnecting conductive wires in the Elasticon™ interposer connector for the packaging interconnections, test and burn‐in applications. The compressibility of interposer connector can be tailored by introducing controlled volume fraction of foam into elastomer or filled elastomer. The foamed elastomer has been successful applied to a new Ball Grid Array (BGA) module testing socket to meet the contact force requirement.

New processes for manufacturing Al/ceramic power substrates have been developed. These processes use a casting-bonding method to bond Al plates to the both sides of ceramic plates. The Al plates formed on the substrates are then chemically etched to be a desired shape using the conventional technology, followed by plating nickel on them. The power substrates manufactured by the process have both a perfect interface and an excellent thermal stress tolerance. Hence, these processes are especially suitable for assembling high reliability power devices such as IGBT power modules.

GFPdNi was tested for Frame-Lid Assemblies (FLAs) utilized in the sealing SC packages. Plating conditions were adjusted to enhance corrosion resistance with concurrent control over hydrogen content and thickness distribution of the deposit. GFPdNi-plated lids exhibit excellent corrosion resistance, most notably when compared standard Au-plated and GFPdNi-plated lids after a heat-treatment used to simulate sealing process (Fig. 1). This is most likely due to PdNi layer being known as a good interdiffusion barrier.

The reliability of lidded packages was tested by standard methods. It has been revealed that the thickness of the PdNi layer affects the yield in thermal cycling and thermal shock experiments. Auger studies implemented for failure analysis showed the correlation between intermetallic diffusion during the sealing process (due to insufficient thickness of PdNi deposit) and the reliability of the solder joint. A successful field evaluation trial has proven the capability of this new plating process.

We have developed a new type of printed circuit board which is called “IBSS” (Interpenetrating polymer network Build up Structure System) for the purpose of meeting the demand of high density routing, high reliability and low cost substrates in IC packages. The new technology achieves 50μm line / 50μm space and 100μm diameter photo‐via hole. Full additive method is applied for patterning, and the build‐up method is used to form the multi‐layer structure. The newly developed photo‐imagable dielectric resin, “IPN”, which has a glass transition of 200'C, a copper peel strength of 1.5kg/cm, and withstands 1000 cycles of temperature cycling (TCB), is used for IBSS. IPN is composed of high heat resistant photo‐sensitive epoxy and supper engineering plastic. This IBSS technology is suitable for direct chip attachment. This paper presents the characteristics IBSS.

This paper reports on the use of an emerging process technique for curing of polymer encapsulants as used in the electronic packaging industry. Previous work performed in the area of materials processing has demonstrated the usefulness of sweeping operating frequencies in order to achieve high levels of electric field uniformity and process control. The use of controlled variable frequency microwave energy has been evaluated as a process technique compatible with electronic packaging requirements. The heating of a series of integrated circuits (ICs) and their subsequent characterization was performed. IC integrity was investigated using X‐Ray, Acoustic Microscopy, Decapsulation and Bond Pull. Processing of liquid encapsulants, underfills and glob‐tops, used in Flip Chip and Chip On Board (COB) applications, was performed. Differential Scanning Calorimetry was used to study cure extent. Further studies show that variable frequency microwave processing leads to fast curing of encapsulants. A reduction in cycle times from 15 to 20 times over conventional curing has been observed. Also, results have showed a reduction in the stresses induced by mismatches in coefficient of thermal expansion.

We have studied the wetting behaviors and interfacial reactions of Pb‐containing (63Sn‐37Pb, 95Pb‐5Sn) and Pb‐free solders (pure Sn, 96Sn‐4Ag, 57Bi‐43Sn, 77.2Sn‐20In‐2.8Ag) on Au foils in order to understand the role of Pb in Pb‐based solders. Surface morphology, wetting angle, and interfacial reaction of the solders were studied by Scanning Electron Microscopy (SEM) and Energy Dispersive X‐ray Analysis (EDX). Pb‐containing and Pb‐free solders (pure Sn, 96Sn‐4Ag, 77.2Sn‐20In‐2.8Ag) showed rough surfaces due to the precipitation of intermetallic compounds on the surface of the solder caps. The eutectic SnBi (57Bi‐43Sn) solder, however, showed a smoother surface. The wetting angle of the eutectic SnPb (63Sn‐37Pb), pure Sn, 96Sn‐4Ag, and 77.2Sn‐20In‐2.8Ag solders decreased significantly with reflow time, while the eutectic SnBi and 95Pb‐5Sn solders showed a much smaller decrease. A large amount of intermetallic compounds was formed throughout the entire region of the solder cap for the eutectic SnPb, 96Sn‐4Ag, 95Pb‐5Sn, and 77.2Sn‐20In‐2.8Ag, mainly due to the high solubility of Au in these solders. Slow intermetallic compound growth was observed for the eutectic SnBi solder.

Electrically conductive adhesives (ECAs) are considered an alternative to solder interconnection in microelectronic circuit packaging. In an effort to understand the performance of this class of materials, several chemical analytical techniques have been employed to characterize polymer chemistry, filler morphology and surface chemistry. These techniques include fourier transform mass spectroscopy pyrolysis (FTMS), optical microscopy, confocal laser scanning microscopy (CLSM), scanning electron microscopy with energy dispersive x‐ray analysis (SEM/EDX), auger electron spectroscopy (AES) and photo‐electron spectroscopy (XPS). Samples studied were conductive adhesive layers and deposits, plated metal surfaces, cross‐sections of bonded joints and fractured bonds. Electrical contact resistance data were also taken on bonded joints. Three commercial adhesives were studied. It was found that thermal stability varied among the three adhesives with one adhesive showing degradation at as low as 200 °C. Differences were also noted in silver flake size, morphology and apparent contact area. Excellent contact resistance stability is achieved with two formulations on a palladium‐nickel alloy surface. In contrast, a hard gold surface yielded unstable contact resistance. Fractured bond surfaces were studied for both stable and unstable joints to understand mechanisms for contact resistance degradation. The increase in contact resistance is most likely caused by oxygen ingress along an interfacial bond where the adherend surface is smooth. The matrix polymer oxidized at the interface when exposed to temperatures above the glass transition temperature. Tin surfaces cause increasing contact resistance and nickel surfaces give an initial contact resistance that is more than two orders of magnitude higher than noble metal surfaces. Oxide formation in both cases is the likely cause for the unstable and high resistances. Various analytical techniques have been used to characterize and differentiate electrically conductive adhesives. Differences among three adhesives are noted and correlated to contact resistance performance.