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New Packaging Substrate Technology,Ibss (Interpenetrating Polymer Network Build Up Structure System)

Published online by Cambridge University Press:  10 February 2011

Motoo Asai*
Affiliation:
MCM project, IBIDEN Co., LTD, 1–1 Kitagata, Ibigawa‐cho, Ibi‐gun, Gifu Pref, 501–06 JAPAN, masai @ attmail.com.
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Abstract

We have developed a new type of printed circuit board which is called “IBSS” (Interpenetrating polymer network Build up Structure System) for the purpose of meeting the demand of high density routing, high reliability and low cost substrates in IC packages. The new technology achieves 50μm line / 50μm space and 100μm diameter photo‐via hole. Full additive method is applied for patterning, and the build‐up method is used to form the multi‐layer structure. The newly developed photo‐imagable dielectric resin, “IPN”, which has a glass transition of 200'C, a copper peel strength of 1.5kg/cm, and withstands 1000 cycles of temperature cycling (TCB), is used for IBSS. IPN is composed of high heat resistant photo‐sensitive epoxy and supper engineering plastic. This IBSS technology is suitable for direct chip attachment. This paper presents the characteristics IBSS.

Type
Research Article
Copyright
Copyright © Materials Research Society 1997

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References

Refferences

1 Enomoto, R, U.S. Patent No. 4 752 499 (6 June 1988)Google Scholar
2 Enomoto, R, Asai, M, Sakaguchi, Y and Ohashi, C (1989) High density printed wiring boards using additive process IPC 32nd annual meeting proceedings, IPC‐TP‐794 Google Scholar
3 Nakamura, M., Kato, M., Asai, M, Takenaka, H. (1995) High reliability, high density build up printed circuit board for MCM‐L 4th International Conference and Exhibition on Multichip Modules Google Scholar
4 Wang, D D and Asai, M, U.S. Patent No. 5 519 177 (21 May 1996)Google Scholar