We examine how the substrate temperature during Ti film sputter deposition influences the subsequent texture formation in TiSi2 thin films. Titanium films of 32 nm thickness were sputtered onto Si(001) at elevated substrate temperatures varying between 100 °C and 900 °C. After the depositions, in situ x-ray diffraction (XRD) measurements were performed to study the thin film reactions in real time, as the samples were annealed. The XRD results show that the substrate temperature significantly influences the texture of the initial Ti film as well as the texture of the resulting C54-phase TiSi2. The preferred Ti orientation gradually changes from (002) to (101) fiber texture as the deposition temperature increases up to 500 °C. Films deposited at 600 °C transformed into the C49 phase during deposition while films deposited at 700 °C and higher temperatures transformed into the C54 phase during deposition. The series of deposited films was annealed up to 1000 °C in He to complete the C54 phase formation while monitoring the texture evolution in situ using a position sensitive x-ray detector. The XRD results show that the final C54 phase texture changes from a dominant (311) orientation normal to the substrate to a (010) orientation for substrate temperatures between 600 °C and 700 °C. The C49-C54 phase transformation temperature is also lowered for these deposition temperatures. Ex situ pole figure analysis of the film deposited at 700 °C confirms the dominant C54 (010) texture and shows an in-plane orientation with C54 [001] ∥ Si [110]. For substrate temperatures between 800 °C and 900 °C, the C54 texture changes dramatically. In this case, θ - 2 θ scans do not show a preferred C54 orientation, but pole figure analysis indicates weak inplane orientations.

We have successfully achieved an ALD like deposition of ZrO2 or HfO2 by using a MO precursor. The MO precursor used in this study was zirconium tetra-tert-butoxide (ZTB) Zr(t-OC(CH3)3)4 and hafnium tetra-tert-butoxide (HTB) Hf(t-OC(CH3)3)4. Because MO precursors are very sensitive to H2O, we used oxygen plasma as an oxidizer instead of H2O in order to reduce background H2O pressure and suppress the background reaction. As a result, we successfully achieved an ALD-like deposition proved by a self-limiting adsorption of MO precursor. The carbon content in the films was suppressed due to highly reactive oxygen plasma. The leakage current of the film with plasma oxidation is much lower than that of film with H2O oxidation. Thus, MO-ALD using a plasma oxidation is a promising candidate for the high-k gate deposition process.

The characteristics of ultra shallow B implantation with mass-analyzed decaborane cluster ions (B10Hx+) are presented. Depth profiles of B and co-implanted H were measured by SIMS, before and after annealing. Annealing results in the increase in the depth of B distribution, due to diffusion, but most of H diffuses out of Si. While the sputtering yield of Si per incoming B in a cluster was found to be comparable to the estimated sputtering yield of Si with B+ ions of the equivalent energy (∼ 1.2 keV), the surface effects of the two types of ions may be quite different. Atomic force microscopy revealed that the smoothing effect of the small decaborane cluster ions, observed previously by us on a surface of amorphous Si, is also present on crystalline Si and even on a much rougher surface of polycrystalline Ta film. The smoothing affects different parts of the power density spectra as functions of spatial frequency in the amorphous and crystalline materials. The smoothing on c-Si surfaces is in sharp contrast to roughening of these surfaces by irradiation with monomer Ar ions, which was done for reference. This indicates that different ion-surface interaction mechanisms are needed to describe impacts of cluster and of monomer ions. All other effects of Si implantation with B10Hx+ measured to date were found to be the same as those with B+ ions of equivalent energy and dose, which confirms that decaborane implantation is an alternative to the very low energy B implantation for ultra shallow p-type junctions in Si devices.

(Ba,Sr)TiO3 (BST) thin films were deposited by ion beam sputtering on both bare and oxidized Si. Spectroscopic ellipsometry (SE) model results have shown an increase in the SiO2 layer thickness for bare substrates and those with a 1 nm initial oxide layer, and a decrease for thicker (3.5 nm) initial SiO2 films. This result was confirmed by high resolution electron microscopy (HREM) analysis of the films, and it is believed to be due to simultaneous subcutaneous oxidation of Si and reaction of the BST layer with SiO2. From high-frequency capacitance-voltage (C-V) analysis, a decrease in the interface trap density Dit of an order of magnitude was observed for oxidized Si substrates.

The bonding, electronic structure and valence band offsets are calculated for various atomic models of interfaces between Si and high dielectric constant insulators ZrO2 and SrTiO3. A non-polar face of the oxide does not necessarily give a semiconducting interface, because of the need to fill Si dangling bond states on the Si side. This can be achieved by stoichiometry changes. Band offsets of semiconducting interfaces are generally the same as those found from bulk charge neutrality levels, indicating no dipole layers. Dipole layers are present at some configurations, where the offset is then changed by up to 1 eV. The states of hydrogen in the oxides are also considered.

The metal gate process becomes a promising candidate for sub-65nm CMOS, due to the elimination of polysilicon depletion effects, and the possibility of adjusting the CMOS threshold voltage without more threshold implants. Our goal is to process mteal films with tunable work functions, in order to meet the demand of sub-65nm metal gate CMOS.

PVD TaN films are deposited with various processing conditions. Auger analysis shows that by changing the nitrogen flow rate and the plasma power, the nitrogen content in the TaN films can be adjusted. In order to accurately determine the work function of these TaN materials, we have developed a Schottky Diode CV technique (or Metal-Silicon CV, or MS-CV). This approach not only improves the accuracy of the metal work function measurement, compared with the traditional MOS-CV technique (which is affected by the thickness and quality of the oxide), but also simplifies the fabrication.

With the MS-CV's, we have successfully measured the work functions of Ni and Co, and compared the data with published references. The work function of PVD TaN actually decreases with higher nitrogen content, according to the Auger data and the MS-CV measurement, ranging from 3.42 – 4.20 Volts. The MS-CV technique is shown to be independent to the size of the capacitors, and is little affected by the measurement frequency. By changing the frequency from 100KHz to 1MHz, the error in the work function is less than 50mV.

Deep-level transient spectroscopy (DLTS) measurements were performed on Si:Sb and Si:B n+-p step junction diodes grown by LT-MBE at various growth temperatures. The trap density dependence on growth temperature decreases with increasing temperature. However, segregation and diffusion increase with increasing temperature. Electron traps, E1 (0.42–0.45eV) and E2 (0.257eV), and hole traps, H1 (0.38–0.41eV), were found in B-doped layer grown at 370°C, 420°C, 500°C, and 600°C. These traps have been characterized by their capture cross-section, activation energy level, and trap density. The origins of the dominating electron traps are hypothesized as the association with pure divacancy defects. E1 level can be assigned for singly negatively charged divacancy V(0/-) + α and E2 level for doubly negatively charged divacancy V(-2/-).

This study describes work carried out to date involving evaluation of the chemical, structural, and electrical performance of ruthenium (Ru) and ruthenium oxide (RuO2) films grown on SiO2 substrates employing metal organic chemical vapor deposition (MOCVD). Diethyl ruthenocene and oxygen were employed as reactant gases for this work, which was carried out using a 200mm wafer cluster tool. The films were characterized using cross-sectional scanning electron microscopy (CS-SEM), four-point resistance probe, x-ray photoelectron spectroscopy (XPS), Rutherford backscattering spectrometry (RBS), x-ray diffraction (XRD), and energy dispersive spectrometry (EDS). Capacitance-voltage (C-V) measurements were also carried out to assess the work function of the deposited films. It was determined that both Ru and RuO2 phases possess near-bulk resistivity and low contamination levels. Importantly, it was observed that the film stoichiometry could be modulated by controlled changes of the processing conditions, and that pure Ru and RuO2 films can be deposited in an oxygen ambient. In order to assess thermal stability, the films were subsequently annealed in forming gas and oxygen ambients, and it was found that the film stability is dependent upon both the deposited phase and the annealing ambient. Results of PMOS gate electrode performance testing of CVD Ru films, has been carried out, and the results are similar to those previously reported for ruthenium-based films.

Amorphous pure and Y-doped ZrO2 and HfO2 were prepared by precipitation with ammonia or hydrazine. Amorphous zirconium and hafnium silicates with SiO2 content from 10 to 90 mol % were prepared by sol-gel. Crystallization was studied by differential scanning calorimetry (DSC) at 20 °C/min and crystallite size after crystallization was determined from XRD data. ZrO2 crystallized into the tetragonal phase with ΔH -21 ±2 kJ/mol and HfO2 into the monoclinic phase with ΔH -31 ±2 kJ/mol. Doping with 20 at.% Y decreased crystallite size after crystallization. Crystallization temperatures for pure and Y-doped ZrO2 samples were in the range 420–440 °C. Crystallization temperatures for pure and Y-doped HfO2 samples varied from 470 to 570°C and correlate with surface area. Crystallization onset temperature in silicates increased with silica content from about 650 to 950 °C for ZrO2·SiO2 and from 740 to 1030 °C for HfO2·SiO2. Tetragonal zirconia and hafnia were the only crystalline phases formed below 1100 °C in all zirconium silicates and in hafnium silicates with more than 10 mol% SiO2. Crystallite size after crystallization decreased with increase in silica content. In hafnium silicate, a decrease in HfO2 crystallite size from 5 to 2.5 ±1 nm corresponds to a crystallization enthalpy change from -22 to -15 ±2 kJ/mol. The tetragonal HfO2/amorphous SiO2 interface energy can be calculated from calorimetric data as ∼0.25 J/m2. The critical particle size for the tetragonal to monoclinic transformation of HfO2 in HfO2-SiO2 system is about 6 nm. We predict that tetragonal HfO2 will be stabilized in films thinner than 2 nm.

Thermal stability of amorphous phases in various high-k layers (Al2O3, ZrO2, HfO2, ZrAlOx, HfAlOx and HfSiOx) and the phase transformation of crystalline ZrO2 and HfO2 were studied experimentally, as functions of surface preparation, deposition conditions, material composition and post deposition thermal treatment. It is found that pure ZrO2 and HfO2 show relatively low crystallization onset temperatures. The crystalline ZrO2 or HfO2 phases are tetragonal or monoclinic, depending on the layer thickness. The phase transformation of metastable t-phase into stable m-phase has been observed in ZrO2 and HfO2. Crystallization behavior of Al2O3 depends on the surface preparation of the substrate. ALCVD grown Al2O3 layers on an oxide-based surface remain amorphous after 1100°C spike annealing, while those on HF-last surface crystallize at temperatures around 800°C. Alloying Al2O3 into ZrO2 and HfO2 can improve their resistance to crystallization under thermal exposure. The kinetics of the crystallization in the alloys can be described by linear TTT curves. Hf-aluminates show better thermal stability than Zr-aluminates. A defect model relative to the phase transformation is discussed, based on the above observations.

In present report, we have studied the initial stage of the growth of crystalline yttria-stabilized zirconia (YSZ) films on the natively oxidized Si (100) wafer by pulsed-laser deposition. X-ray photoelectron spectroscopy (XPS) and high-resoluti on transmission electron microscopy (HRTEM) show that, for the first few monolayers of crystalline YSZ deposited on Si (100), the dynamic processes appear to be the decomposition of SiO2 to SiO, the formation of ZrO2, and the desorption of SiO. The native amorphous silicon oxide layer is removed completely with the continued deposition of YSZ and the oxygen in this layer is used as oxygen source for forming stable crystalline oxide film. XPS depth profile and HRTEM investigation showed that the interface of crystalline YSZ film in contact with silicon was found to be atomically sharp and commensurately crystallized without an amorphous layer. The interface structure is suggested to have a sequence of-Si-O-Zr-O-. For the film with electrical equivalent oxide thickness 1.46 nm, the leakage current is about 1.1×10-3 A/cm2 at 1 V bias voltage. The hysteresis and interface state density in this film are measured to be less than 10 mV and 2.0×1011eV-1cm-2.

We developed an original thermally stimulated exoelectron emission spectroscopy method (TSEE) of measurements of the activation energy Φ of electron (hole) traps in ultrathin Si3N4 films. The temperature spectra of TSEE of 50A silicon nitride films demonstrate several peaks: three low temperature peaks (T1 =373K, T2=423K, T3=498K) and a high temperature maximum at T4 ∼750K. The obtained values of the energy activation are Φ1=0.82 eV, Φ2=0.93 eV, Φ3=1.09 eV, and Φ4=1.73 eV. TSEE results are shown to be consistent with Φ estimates obtained from microFLASH® two bit per cell memory transistor measurements. Electrons stored at traps with Φ4=1.73 eV explain excellent microFlash retention properties. We believe that deep traps in Silicon Nitride are Hydrogen containing centers, while Hydrogen hopping is the route cause of observed material degradation in course of TSEE measurements.

As the MOSFET dimensions continue to shrink, source/drain contact resistance is emerging as the dominant component of the MOSFET parasitic series resistance. To meet the series resistance requirements of future MOSFETs, contact resistivity values near 10-8 ohm-cm2 are required. Selective Si1-xGex source/drain technology has been proposed as an alternative to ionimplantation to form the ultra-shallow junctions of future CMOS technology nodes. One of the key advantages of this technology is the smaller band gap of Si1-xGex, which provides a smaller contact barrier height, an essential requirement for reducing the contact resistivity. We have previously reported low-resistivity of Ni germanosilicide NiSi1-xGex and Pt germanosilicide PtSi1-xGex contacts to boron doped Si1-xGex alloys. In this work, Zr germanosilicide, Zr(Si1-xGex)2 was considered as an alternative material with a higher thermal stability than Ni and Pt germanosilicides. The contact resistivity values for different contact materials were measured using four-terminal Kelvin structures. The results from this work show that both Zr and Pt germanosilicides yield high contact resistivity values around 10-7 ohm-cm2. On the other hand Ni germanosilicide contacts can reach 10-8 ohm-cm2 with further improvements using a thin layer of Pt under Ni.

Advanced CMOS substrates composed of ultra-thin strained-Si and SiGe-on-insulator were fabricated, combining both the benefits of high-mobility strained-Si and SOI. Our pioneering method employed wafer bonding of SiGe virtual substrates (with strained-Si layers) to oxidized handle wafers. Layer transfer onto insulating handle wafers can be accomplished using grind-etchback or delamination via implantation. Both methods were found to produce a rough transferred layer, but polishing is unacceptable due to non-uniform material removal across the wafer and the lack of precise control over the final layer thickness. To solve these problems, a strained-Si stop layer was incorporated into the bonding structure. After layer transfer, excess SiGe was removed using a selective etch process, stopping on the strained-Si. Within the context of ultra-thin SSOI and SGOI fabrication, this paper describes recent improvements including metastable stop layers, low temperature wafer bonding, and improved selective SiGe removal.

Evaluation of physically thicker gate insulator materials with significantly higher dielectric constants (k = 10 – 25) as potential replacements for silicon dioxide, SiO2 (k = 3.9), and silicon oxynitride continues to be a focus of the semiconductor industry. The challenge is to provide a film with lower leakage current and with capacitance equivalent to < 1.0 nm SiO2 [1–4]. One such candidate material; metal-organic chemical vapor deposited (MOCVD) hafnium silicate, has been physically characterized by high resolution transmission electron microscopy (HRTEM) in plan view, as a blanket, uncapped film and high angle annular dark field scanning transmission electron microscopy (HAADF-STEM) in cross section following integration into capacitors and complementary metal oxide semiconductor (CMOS) transistors. Changes in the material microstructure associated with phase segregation and crystallization as a function of Hf silicate composition and rapid thermal anneal (RTA) temperature have been observed and a discussion of the segregation mechanisms is presented [5–8]. Also, various methods of incorporating nitrogen into bulk hafnium silicate films have been investigated and resultant transistor electrical performance data has been correlated with physical characterization for NH3 post deposition anneal (PDA) treatments at various temperatures.

In this work, the electrical performance and interfacial characteristics of MOCVD-grown Al2O3 films are evaluated. Electrical characteristics (dielectric constant, leakage current) of as-deposited and annealed capacitor metal-oxide-semiconductor (MOS) stacks were determined using capacitance-voltage (C-V) and current-voltage (I-V) measurements. It was observed that the electrical properties were dependent upon specific annealing conditions, with an anneal in O2 followed by forming gas being superior with respect to leakage current, resulting in leakage characteristics superior to those of SiO2. All annealing conditions evaluated led to an increase in dielectric constant from 6.5 to 9.0–9.8. Also, Al2O3 growth and interfacial oxide growth characteristics on oxynitride/Si and Si substrates were evaluated and compared using spectroscopic ellipsometry. A parasitic oxide layer was observed to form on silicon during the initial stages of MOCVD Al2O3 growth, while a thin oxynitride layer deposited on Si prevented the growth of interfacial oxide.

First principles total energy calculations were performed in order to characterize O vacancy defects in Ta2O5. A simplified version of the crystalline orthorhombic phase of Ta2O5 was used in this study. Results indicate that O vacancies in Ta2O5 can be broadly classified based on their location in the lattice. One type of vacancies (occupying the “in-plane” sites) displays deep or mid gap occupied states, and shallow unoccupied states, while a second type (occupying “cap” sites) results in shallow occupied states. For a wide range of local Fermi level or chemical potential, the neutral and +2 charged states of the in-plane type vacancy and the +2 charge state of the cap type vacancy are found to be most stable. Migration energies of the two types of vacancies in the neutral and +2 charge states are markedly different, with the “cap” type of vacancies displaying very high barriers to migration (∼ 5 eV) compared to the “in-plane” type (∼ 0.5–1.0 eV).

As the CMOS device dimensions continue to shrink, it is more and more critical to control the process parameters during mass production of advanced VLSI chips in order to achieve high yield and profitability. 2D dopant characterization is one of the critical techniques to resolve manufacturing excursions. A quick access to dopant distribution, especially precise delineation of p-n junction would readily provide critical information for many manufacturing issues, as well as device design and process development. Here we present our approaches to some of those issues with available techniques. The main techniques we used are dopant selective etching (DSE) and scanning probe microscopy based electrical measurements including scanning capacitance microscopy (SCM) and scanning spread resistance microscopy (SSRM). These techniques provided complementary results and showed strengths in solving different issues. We have successfully delineated junction of CMOS devices with 0.13 μm technology with source/drain extensions. Other applications, including diode leakage, well-well isolation, and buried layer delineation with the combination of these methods are presented.

This paper presents a systematic investigation of thermal stability of high-k materials deposited on RCA cleaned wafers by ALCVD™ in an ASM Pulsar™ 2000 reactor. Physical-chemical evolution of Al2O3, HfO2 and Al/Hf composite materials (nanolaminate and aluminates) was studied considering two types of thermal treatments: quenched vacuum anneals from 300°C to 900°C and furnace atmospheric processes in N2 or O2 at 850°C and 900°C. Material crystallization and changes in film structure were studied by means of TEM, XRD, XRR, XRF, RBS and TOF-SIMS. Non-contact electrical measurements were used to detect modification in EOT and fixed charge. Al2O3 was found still amorphous at 900°C. Not so for HfO2 that crystallized in monoclinic phase at a temperature between 300–400°C. Crystallization temperature and possible phase separation of Al/Hf composite materials were found to be a function of Al2O3 content and film type. In most of these samples, however, a chemical evolution was detected in addition to the above reported crystallization phenomena. All the achieved results demonstrate that depending on thermal treatment conditions, ALCVD™ high-k stability does not only concern phase transition effects but also a transformation of the “SiO2/high-k” system into “doped-SiO2/silicate” stack.

Hafnium-based dielectrics are under wide consideration for high-K gate dielectric applications. Since the gate electrode typically used in CMOS integration consists of polysilicon with n- or p-type dopants, compatibility of the HfO2 layer with the polySi deposition and dopant activation steps is critical. Capacitors were fabricated with HfO2 films deposited by ALD and MOCVD, and using polysilicon gate electrodes deposited by CVD processes. These devices showed leakage failures with yields that were observed to depend on the area, dielectric thickness and annealing conditions during the process. Investigation of the root cause of these leakage failures suggested that the leakage failures may be caused by a defect-related mechanism. The implication of this is that the leakage occurs at localized ‘defect’ sites rather than broadly through the HfO2 layer. Emission microscopy analysis and physical characterization of the HfO2 film were used to corroborate the proposed model. Defect density was observed to be strongly dependent on the processing of the dielectric film. In order to make Hf-based dielectric stacks compatible with polysilicon for conventional CMOS transistor integration with acceptable yield, further postdeposition treatment may be necessary to eliminate or cure the defects.