The channel formation process of a pentacene ambipolar field-effect transistor was studied by displacement current measurement (DCM). We proposed a modified measurement circuit of DCM in order to investigate the channel formation at the organic/insulator interface under transistor operation. We observed an additional terrace structure between the depletion and accumulation states when the drain voltage is applied. The capacitance at the terrace structure corresponds well with that in pinch-off condition. DCM enables us to understand the operation mechanism of the organic FET in more detail.

ZnO TFTs with bottom gate top S/D contact architecture were fabricated by sputtering of ZnO with layer thicknesses from 30 nm to 100 nm. The effect of post deposition annealing in oxygen and forming gas atmospheres at 400°C to 500°C on the devices was investigated. The tendencies of a lower threshold voltage Vth and a higher saturation mobility μsat for higher annealing temperature can be observed for both oxygen and forming gas annealing. Reduction of trap density in oxygen annealing and additional hydrogen incorporation in forming gas annealing play an important role for these electrical parameters. Morphological changes of increased grain size and fewer grain boundaries in the channel also contribute to tendencies in electrical characteristics of ZnO TFTs.

In this work, we report the characterization of Spin-On Glass (SOG) as low temperature gate insulator. Our SOG film was deposited at temperature of 200°C, which is compatible to use on flexible substrates. The optical and electrical characterization showed that the refractive index and dielectric constant are very close to those of thermally grown SiO2. Also, analysis of surface roughness by AFM is presented. We demonstrated the use of SOG as gate insulator, fabricating and characterizing inverted staggered a-SiGe:H TFTs. The observed results are promising and suggest that SOG films deposited at 200°C in the Laboratory of Microelectronics of INAOE could be an alternative to improve electrical characteristics of TFTs on low temperature flexible substrates.

A low temperature amorphous zinc indium oxide (ZIO) thin film transistor (TFT) backplane technology for high information content flexible organic light emitting diode (OLED) displays has been developed. We have fabricated 4.1-in. diagonal OLED backplanes on the Flexible Display Center’s six-inch wafer-scale pilot line using ZIO as the active layer. The ZIO based TFTs exhibited an effective saturation mobility of 18.6 cm2/V-s and a threshold voltage shift of 2.2 Volts or less under positive and negative gate bias DC stress for 10000 seconds. We report on the critical steps in the evolution of the backplane process: the qualification of the low temperature (200°C) ZIO process, the stability of the devices under forward and reverse bias stress, the transfer of the process to flexible plastic substrates, and the fabrication of white organic light emitting diode (OLED) displays.

ZnO:Al films with a thickness of about 880nm were deposited by magnetron sputtering. The glass substrate was not heated neither before during nor after the deposition. Subsequently the deposited layers were treated by flash lamp annealing (FLA) at 1.3 ms. Using this method, the resistivity of the ZnO:Al films was decreased by a factor of two, down to 1.0 x 10-3 Ωcm. These results are in good agreement with results reported from rapid thermal processing or furnace annealing treatments. Despite the very short annealing time of only 1.3 ms not only the resistivity but also the transmittance in the UV and the blue range were considerably improved.

The electrical and physical quality of gate and passivation dielectrics significantly impacts the device performance of thin film transistors (TFTs). The passivation dielectric also needs to act as a barrier to protect the TFT device. As low temperature TFT processing becomes a requirement for novel applications and plastic substrates, there is a need for materials innovation that enables high quality plasma enhanced chemical vapor deposition (PECVD) gate dielectric deposition. In this context, this paper discusses structure-property relationships and strategies for precursor development in silicon nitride, silicon oxycarbide (SiOC) and silicon oxide films. Experiments with passivation SiOC films demonstrate the benefit of a superior precursor (LkB-500) and standard process optimization to enable lower temperature depositions. For gate SiO2 deposition (that are used with polysilicon TFTs for example), organosilicon precursors containing different types and amounts of Si, C, O and H bonding were experimentally compared to the industry standard TEOS (tetraethoxysilane) at different process conditions and temperatures. Major differences were identified in film quality especially wet etch rate or WER (correlating to film density) and dielectric constant (k) values (correlating to moisture absorption). Gate quality SiO2 films can be deposited by choosing precursors that can minimize residual Si-OH groups and enable higher density stable moisture-free films. For e.g., the optimized precursor AP-LTO® 770 is clearly better than TEOS for low temperature PECVD depositions based on density, WER, k charge density (measured by flatband voltage or Vfb); and leakage and breakdown voltage (Vbd) measurements. The design and development of such novel precursors is a key factor to successfully enable manufacturing of advanced low temperature processed devices.

An organic/inorganic hybrid-type nonvolatile memory TFT was proposed as a core device for the future flexible electronics. The structural feature of this memory TFT was that a ferroelectric copolymer and an oxide semiconductor layers were employed as a gate insulator and an active channel, respectively. The memory TFT with the structure of Au/poly(vinylidene fluoride-trifluoroethylene)/Al2O3/ZnO/Ti/Au/Ti/poly(ethylene naphthalate) could be successfully fabricated at the process temperature of below 150°C. It was confirmed that the TFT well operated as a memory device even under the bending situations.

Hybrid field-effect-transistors (FETs) with germanium nanowire (NW) arrays and organic gate dielectric are presented. The nanowire deposition steps are fully compatible with printed electronics route. NW FETs demonstrate good performance with On/Off ratios of ~103 and hole mobilities of ~13 cm2/Vs in both nitrogen and air atmosphere. These results suggest that the hybrid nanowire FETs could be used in large area inexpensive electronics.

We have already reported that low-temperature (about 170 °C) preparation technique of silicon dioxide (SiO2) dielectric thin film that has high resistivity and extremely smooth surface by the photo oxidation process. In this paper, we have developed a low-damage preparation technique to fabricate a SiO2 thin film by the photo-assisted low temperature oxidation process in order to apply this process to the flexible electronics using for convenient plastic films. We have reported that the SiO2 dielectric thin film with a high insulation performance can be prepared by the low temperature processing below 100°C by improving the pre-processing of the photo oxidation of thin film.

We investigated the pressure dependence of the inductive coupled plasma (ICP) oxidation on the electrical characteristics of the thin oxide films. Activation energies and electron temperatures with different pressures were estimated. To demonstrate the pressure effect on the plasma oxide quality, simple N type metal-oxide-semiconductor (NMOS) transistors were fabricated and investigated in a few electrical properties. At higher pressure than 200mTorr, plasma oxide has a slightly higher on-current and a lower interfacial trap density. The on-current gain seems to be related to the field mobility increase and the lower defective interface to the electron temperature during oxidation.

We have fabricated high performance amorphous IGZO TFTs and integrated circuits on flexible kovar (Ni-Fe 42 alloy) foils. Excellent dimensional stability on kovar foils is obtained by a pre-anneal process at 800°C that limits the thermal run-out to within 100ppm. After substrate annealing, Ni-Fe 42 alloy retains high yield strength and good flexibility with the re-crystallized structure containing large isotropic grains between 20-50μm. Amorphous IGZO TFTs and circuits with a staggered, bottom-gate architecture are fabricated and tested. Non-flexed TFTs have field effect mobility of 12 cm2/V.s, threshold voltage around 2 V and sub-threshold swing of 0.6 V/decade and ON/OFF current ratio exceeding 107. Under prolonged uniaxial tensile strain upto 0.8%, TFTs exhibited minimal change in performance which augers well for use of Ni-Fe foil as flexible substrates. To demonstrate the viability of oxide-based device integration, n-type pseudo logic ring oscillator circuits are also evaluated. Sub 300 ns propagation delay is confirmed at a rail-rail supply voltage of 40 V. The results suggest that device integration on such a highly flexible substrate is amenable to roll-to-roll processing of future electronics.

Organic thin-film transistors (OTFTs) using cross-linked olefin polymer as a gate insulator were fabricated on a plastic film. An olefin polymer layer was formed by spin-coating and baking at temperatures below 150°C. Pentacene was used as an organic semiconductor layer. The fabricated OTFTs with a short 5-μm-long channel showed a mobility of 0.1-0.2 cm2/Vs and a current ON/OFF ratio of 107. These OTFTs also exhibited good stable performance in the atmosphere. On the basis of the results, we fabricated a 5 inches OTFT-driven flexible active-matrix organic light emitting diode (AMOLED) display. The gate insulator, some metal wirings and electrodes on the OTFT backplane were formed on the plastic film by photolithography. After fabrication of the OTFT backplane, OLED layers were formed by vacuum deposition through a shadow-mask. Clear color moving images were observed on the flexible display even when it was bent.

ZnO/Ta2O5 heterojunctions were formed on glass substrates using low temperature processes. Formerly insulating Ta2O5 films were deposited on glass substrates by vacuum evaporation using Ta2O5 powder, Afterwards transparent and conductive ZnO films were formed on the Ta2O5 films by thermal oxidation at 3200C in air atmosphere of zinc (Zn) films deposited by dc sputtering process. Structural and optical properties of ZnO were investigated by X-ray diffraction (XRD) and photoluminescence (PL). The Ta2O5 insulating films were characterized by Raman scattering. The ZnO/Ta2O5 heterojunction was characterized by current-voltage measurements at room temperature as well as transient response under a rectangular-pulse voltage source. The electrical and the transient response suggest that the ZnO/Ta2O5 heterojunction is a potential alternative for the fabrication of alternating-current-driven thin film electroluminescent (ACTFEL) devices.