Improvement activities were made in fully integrated Metal-Insulator-Metal (MIM) capacitors (>5fF/μm2) used in the advanced SiGe RF BiCMOS technology. By changing the process sequence of the lower metal electrode and the MIM capacitor, an improved MIM capacitor has achieved a lower leakage density with a better voltage linearity at 27°C − 150°C temperature range and a lower temperature dependency from −6V to +6V. Voltage coefficients VC1 and VC2 are 187ppm/V and 24ppm/V2 respectively, and temperature coefficient of capacitance TC1 is 99 ppm/°C with a negligible TC2. The leakage current density is 3.1×10−3 A/cm2 at 125°C for 5.5V with a breakdown voltage of 20V.

To increase capacitance density while maintaining low leakage, an ozone treatment after tantalum pentoxide film deposition has been investigated. A capacitance density as high as 10.3fF/μm2 has been achieved with a leakage density one order lower than the standard process. The fact that the extracted dielectric constant increased from 28 to 32 as well as the significant changes of the voltage and temperature coefficients clearly indicated that the ozone treatment has changed the intrinsic property of the tantalum pentoxide film as well as the top dielectric surface.

LTCC substrates for fine pitch (1.0 mm and 0.8 mm) CSP applications have been designed, fabricated, and assembled. The assembly process, including ball grid array (BGA) solder ball attach, die mount, wire bond, and glob top is described. The material and physical design interaction issues that emerged during development are discussed.

The initial CSP design was conventional, with co-fired yellow gold (Au) vias and capture pads and post-fired solderable gold (PtPdAu) pads for solder ball attachment. Because LTCC tape shrinks during co-fire, solder pads were applied post co-fire to ensure proper mating with existing test fixtures and to provide the best alignment relative to the CSP body. Solder pad to capture pad misalignment was visible following solder pad firing. After CSP attachment to a test board, electrical tests revealed opens. Investigation led to the following conclusions. The decreased solder pad diameter necessary to accommodate the fine pitch design was significant relative to the area allocated for the underlying via and capture pad. Misalignment that would have been hidden under larger solder pads was exposed. Even when the capture pad surface was not visibly exposed, the offset solder pad meant less material between the capture pad and the solder ball, less of a barrier to solder leaching. Solder leaching into the yellow gold, observed after CSP removal from the test board, was the cause of the electrical disconnects. In the second design, the capture pad was eliminated in order to discourage leaching by reducing the volume of yellow gold available to alloy with the solder pad during co-fire. Reflow operations still resulted in leached solder pads. A third design replaced the first-layer via yellow gold with a solderable gold. This design proved to be robust.

While developing designs and fabricating these prototypes, it was noted that all ball failures consistently occurred between the solder pad and the LTCC substrate. To investigate adhesion using different metallizations, shear tests were performed on LTCC substrates with either post-fired solder pads or co-fired pads. To investigate how the substrate material affects adhesion, alumina CSPs were also sheared. Shear test results are presented.

Copper metallization for GaAs was evaluated by using Cu/Ta/GaAs multilayers for its thermal stability. A thin Ta layer of 30 nm thickness was sputtered on the GaAs substrate as the diffusion barrier before copper film metallization. As judged from the results of sheet resistance, X-ray diffraction, Auger electron spectroscopy and transmission electron microscopy, the Cu/Ta films on GaAs were very stable up to 500 °C without Cu migration into GaAs. After 550 °C annealing, the interfacial mixing of Ta with GaAs substrate occurred, resulting in the formation of TaGa2 and TaAs2, and the diffusion of Ga and As through the Ta layer formed the Cu3Ga and Cu3As phases at the Cu/Ta interface. After 600 °C annealing, the reaction of GaAs with Ta and Cu formed TaAs and Cu3Ga, as a result of Cu migration and interfacial instability.

A method for hybrid integration of III-V optoelectronic components on Si substrate using BCB was demonstrated. The method included bonding, selective wet etching of the GaAs substrate, components separation by wet etching, two-level metallization and lateral oxidation to form optical apertures. Simulations of thermal behavior and mechanical stresses of this integration scheme were performed using finite element analysis, which revealed adequate heat dissipation. Simulations show that this bonding protocol allows reduction of overheating and mechanical stress that enhances the optoelectronic device performance and increases reliability. Electro-luminescence spectrum, I-V and P-T characteristics were measured and compared with a reference homoepitaxial structure and the results of the simulations. Measured thermal impedance was found to be less then two times higher than that for the devices on a host GaAs wafer. Novel method of substrate removal named oxidation lift-off was proposed and demonstrated. This process allows to release a VCSEL structure with epitaxial DBRs and separate individual components on Si, reduces the number of process steps and eventually reduces cost of the fabricated devices. Au/Ge alloy was used for the metal bonding of the test oxidation lift-off structure. Substrate removal, device separation, bonding and formation of the oxide apertures were done within a single processing step.

Ordered structures of Ba(Cd1/3Ta2/3)O3 ceramics with and without boron additive were investigated systemically by electron diffraction and high resolution transmission electron microscopy. The results showed a well-ordered structure of 1:2 with hexagonal symmetry for Ba(Cd1/3Ta2/3)O3 with boron additive. No significant changes in ordered structures were observed after long-period annealing. The 1:2 ordered domain structures (average domain size ∼18 nm) and high-density domain boundaries induced by ordering were observed for Ba(Cd1/3Ta2/3)O3 without boron additive sintered at relatively high temperature. The sintering process has a profound influence on the microstructure of Ba(Cd1/3Ta2/3)O3 ceramics.

SiGe/Si n-type modulation doped field effect structures and transistors (n-MODFETs) have been fabricated on r-plane sapphire substrates. The structures were deposited using molecular beam epitaxy, and antimony dopants were incorporated via a delta doping process. Secondary ion mass spectroscopy (SIMS) indicates that the peak antimony concentration was approximately 4×1019 cm−3. The electron mobility was over 1,200 and 13,000 cm2/V-sec at room temperature and 0.25 K, respectively. At these two temperatures, the electron carrier densities were 1.6 and 1.33×1012 cm−2, thus demonstrating that carrier confinement was excellent. Shubnikov-de Haas oscillations were observed at 0.25 K, thus confirming the two-dimensional nature of the carriers. Transistors, with gate lengths varying from 1 micron to 5 microns, were fabricated using these structures and dc characterization was performed at room temperature. The saturated drain current region extended over a wide source-to-drain voltage (VDS) range, with VDS knee voltages of approximately 0.5 V and increased leakage starting at voltages slightly higher than 4 V.

Draper Laboratory designs and produces ultra-dense multi-chip modules that achieve an integration density, which is only exceeded by that of custom ASIC chips. These modules are fabricated by tiling an adhesive coated substrate with bare integrated circuit chips and passive components that are thinned to 150 microns thick. Multiple layers of thin film copper conductors, supported on Kapton film dielectric, are used to route signals between these components. Connections to their I/O pads and between signal layers are made through laser drilled vias, which are copper plated. The various types of capacitors used in modules for RF applications present several fabrication challenges. In comparison to active IC devices, capacitors have wider dimensional tolerances, are more easily damaged by mechanical handling, and are more susceptible to damage during laser drilling of vias. This paper will discuss these issues and the approaches that have been taken to address them.

MEMS technology is rapidly emerging as an enabling technology to yield a new generation of highperformance RF-MEMS passives, like switches, tunable capacitors, high-Q resonators and tunable filters. This paper presents the progress in RF-MEMS device and package development with focus on relevant technology and material issues. The importance of wafer-level or 0-level packaging of the RF-MEMS devices is elucidated. Examples of 1-level packaging, e.g., chip-on-board or plastic molded 1-level package, are briefly described. The paper concludes in stipulating how integration of RF-MEMS passives with other passives (as inductors, LC filters, SAW devices) and active circuitry (RFICs) can lead to so-called “RF-MEMS system-in-a-package (RF-MEMS-SiP)” modules. The evolution of the RF-MEMS-SiP technology is illustrated using IMEC's microwave multi-layer thin film MCM-D technology.

High-density MOS capacitors have been fabricated with ∼ 30 nF/mm2 specific capacitance on highly-doped Si-wafers with arrays of macropores with ∼ 2 μm diameter. Using the Bosch process [1] these pores were dry-etched to depths of ∼ 30 μm or more. The enlarged Si-surface thus obtained serves as a substrate for capacitors fabricated by fully MOS-compatible processing.

Wafers were fabricated with a top electrode of poly-Si and Al and ‘ONO’ (i.e. oxide / nitride / oxide) dielectric stacks showing 7–10 MV/cm electrical breakdown field and leakage < 1 nA/mm2 @ 20 V. These wafers were thinned to 380 μm and sawn into dies, representing 40 nF capacitors. Typically low loss factors such as ESR < 50 mΩ and ESL < 20 pH and resonance frequencies of ∼ 0.1 GHz were found for 40 nF capacitor dies. Next, 40 nF dies were mounted by wire bonding on Al2O3 or laminate substrate as supply-line decoupling capacitors in complete GSM power amplifier test modules. RF decoupling and transmission were measured and compared to identical test modules with conventional discrete ceramic capacitors. The MOS capacitors showed very efficient decoupling, resulting in superior signal stability as measured in the 0 – 1 GHz range (less noisy, free from oscillations).

The new capacitor is very suitable for integrated decoupling purposes, e.g. supply-line decoupling in RF wireless communication and analog and mixed-signal systems.

The results of structural and electrical characterizations of SrTiO3 thin films deposited onto LaAlO3 substrates by pulsed laser deposition technique are presented. The appearance of the ferroelectric phase in these films has been experimentally documented, the transition temperature being in the range of 90–120K. The hysteresis loops have been monitored in a wide temperature range by using thin film planar capacitors, the driving field being predominantly in the plane of the film. The switching properties of the films has been studied at low temperatures (∼25K) and well saturated loops have been observed with relatively low coercive field (<6kV/cm for 10μm gap). The presence of the imprint phenomenon has been also found at low temperatures.

The microstructure of the investigated SrTiO3 thin films has been studied by using a high resolution transmission electron microscope (TEM). It has been found that the annealed and as-deposited thin films, being of the same composition, have quite different microstructures. The difference observed in the polarization response of the films is related to that in their microstructure.

Ferrites have magnetic properties suitable for electronic applications, especially in the microwave range (circulators and isolators). Hexagonal ferrite, such as barium ferrite (BaFe12O19 or BaM), are of great interest for microwave device applications because of their large resistivity and high permeability at high frequencies.

This contribution focuses on BaM films, 1 to 10 microns thick, which were deposited under optimized conditions by RF magnetron sputtering on alumina or silicon substrates. In order to crystallize the films that were amorphous after deposition, a post deposition annealing at 800°C was implemented. Optimized samples presented a good crystallization, a smooth surface and no cracks. The films were either randomly oriented or showed slight preferential orientations among the crystallographic planes (101), (200), (206), (102), (110) and (205) when the substrates were heated up to 400°C during the deposition. Ba, Fe and O depth profiles obtained by Secondary Ion Mass Spectroscopy (SIMS) showed that the films have a good in-depth uniformity. The magnetic properties of BaM films determined by VSM, showed that the optimized coercive force and the saturation magnetization reached 330 kA/m and about 500 mT respectively. These values are closed to that of the bulk BaM.

Isolators were then realized using patterning of coplanar metallic lines with standard lift-off technique. The slots and the central width were set to 300 μm, gold was used for the lines. First results on transmission coefficients showed a non reciprocal effect, which reaches 3.3 dB/cm at 50 GHz. This proved that such a component behaves like an isolator in the 50 GHz band.

Solid solutions in the Ag(NbxTa1−x)O3 (where 0 ≤ × ≤ 1) system exhibit excellent dielectric properties at microwave frequency including high dielectric constant (200<k<400), low loss (tanΔ ∼ 0.004) and a composition controlled temperature coefficient of capacitance (TCC). For Ta-rich and Nb-rich solid solutions, the TCC values are negative and positive, respectively, and two-phase mixtures provided an average TCC close to zero. Series, parallel, and logarithmic mixing rules were applied to predict dielectric constant and TCC of polyphase assemblages (45wt%Ag(Nb0.65Ta0.35)O3+55wt% Ag(Nb0.35Ta0.65)O3) yielded an average dielectric constant of 450 and a TCC of 180ppm/°C. Microstructure analysis revealed that a CuO-rich liquid remains at the grain boundary and transmission electron microscopy shows that the CuO resides at triple points. Ag(NbxTa1−x)O3 ceramics were successfully integrated into LTCC for embedded capacitors. The addition of CuO lowered the sintering temperature to below 900°C and a low TCC was maintained for fine grained microstructures.

The dielectric properties and the microstructures of xLa(Mg1/2Ti1/2)O3−(1−x)CaTiO3 ceramics with B2O3 additions (0.25wt%) prepared with conventional solid-state route have been investigated. Doping with B2O3 (0.25wt%) can effectively promote the densification and the dielectric properties of xLa(Mg1/2Ti1/2)O3−(1−x)CaTiO3 ceramics. It is found that xLa(Mg1/2Ti1/2)O3−(1−x)CaTiO3 ceramics can be sintered at 1400°C due to the liquid phase effect of B2O3 addition observed by Scanning Electronic Microscopy. At 1425°C, 0.5La(Mg1/2Ti1/2)O3−0.5CaTiO3 ceramics with 0.25 wt% B2O3 addition possesses a dielectric constant (εr) of 43, a Q×f value of 24470 (at 8GHz) and a temperature coefficients of resonant frequency (τf) of -8.94 ppm/°C. As an increasing the content of La(Mg1/2Ti1/2)O3, the highest Q×f value of 30824(GHz) could be achieved for X=0.7.

The properties of AlN films grown on a first set of differently treated AlN films have been studied by XRD, XPS, AFM, in-plane stress and interferometry. All films were deposited by dc pulsed sputtering at 300°C. The first set of films consisted of smooth, pure c-axis oriented AlN monolayers with narrow rocking curve width and excellent piezoelectric coefficient grown on platinized substrate in a large thickness range of 35–2000 nm. Subsequently, a 1000 nm AlN layer has been added. The use of a strongly alkaline developer during intermediate lithography steps and the time elapsed between the two steps of AlN re-growth were found to degrade the overall quality of the films. It's been shown that the alkaline developer etches down, increases the roughness and contaminates the surface of the AlN monolayer with mainly oxides and hydroxides while the exposure of the films to air develops a native oxide layer. By reducing the air exposure time and by the use of RF plasma cleaning prior to the re-growth process, a good piezoelectric coefficient can be recovered.

Ceramic sintering in microwave field is a new ceramic processing method. In present paper, we detected the microstructures and boundary segregation of BaTiO3 ceramics which were sintered in microwave field. Scanning electron microscopy(SEM), and transmission electron microscopy(TEM), and chemical analysis methods were employed to detect the microstructure of BaTiO3, element distribution near the boundary of BaTiO3 ceramic. The results shown growth of grain of the ceramic was influenced by impurities such as acceptor, benefactor et al, and the element distribution near the grain boundary of BaTiO3 sintered in microwave field were different with that sintered in conventional method. The boundary segregations of BaTiO3 sintered in microwave field were not obvious as compared to the conventional method because the diffusion was enhanced due to the microwave field.

The microwave dielectric properties of (1-x)CaTiO3-xNd(Mg1/2Ti1/2)O3 (0.1≤x≤1.0) have been investigated. The system forms a solid solution throughout the entire compositional range. The dielectric constant decreases from 152 to 27 as x varies from 0.1 to 1.0. In the (1-x)CaTiO3-xNd(Mg1/2Ti1/2)O3 system, the microwave dielectric properties can be effectively controlled by varying the x value. A maximum quality factor Qxf=43000GHz (where f is the resonant frequency) was achieved for samples with x=0.9, although the dielectric properties varied with sintering temperature. The Qxf value of (1-x)CaTiO3-xNd(Mg1/2Ti1/2)O3 almost increased up to 1500°C, after which it decreased. At 1400°C, 0.1CaTiO3-0.9Nd(Mg1/2Ti1/2)O3 ceramics gives a dielectric constant εr of 42, a Qxf value of 35000 (GHz) and a τf value of -10 (ppm/°C).

A technology platform is described for the integration of low-loss inductors, capacitors, and MEMS capacitors on a high-resistivity Si substrate. Using this platform the board space area taken up by e.g. a DCS PA output impedance matching circuit can be reduced by 50%. The losses of passive components that are induced by the semi-conducting Si substrate can effectively be suppressed using a combination of surface amorphisation and the use of poly crystalline Si substrates. A MEM switchable capacitor with a capacitance switching factor of 40 and an actuation voltage of 5V is demonstrated. A continuous tuneable dual-gap capacitor is demonstrated with a tuning ratio of 9 using actuation voltages below 15V.

Barium titanate thin films have been prepared by chemical solution deposition on 18 μm thick, industry standard copper foils in the absence of chemical barrier layers. The final embodiment exhibits randomly oriented BaTiO3 grains with diameters between 0.1 and 0.2 μm, and an equiaxed morphology. The average film thickness is 0.6 μm and high resolution cross sectional microscopy shows no indication of interfacial phases. The BaTiO3 films are sintered in a high temperature reductive atmosphere such that copper oxidation is avoided. Subsequent lower-temperature, higher oxygen pressure anneals are used to minimize oxygen point defects. Permittivities greater than 3000 are observed, with loss tangents under 2.5%. The BaTiO3 phase exhibits pronounced ferroelectric switching and coercive field values near 20 kV/cm. Temperature dependent measurements indicate a ferroelectric transition near 100 °C with very diffuse character. Combining the approaches of the multilayer capacitor industry with traditional solution processed thin films has allowed pure barium titanate to be integrated with copper. The high sintering temperature – as compared to typical film processing – provides for large grained films and properties consistent with well-prepared ceramics. Integrating BaTiO3 films on copper foil represents an important step towards high capacitance density embedded passive components.

From fundamental ionic polarizability concepts, LaScO3 was projected as a candidate dielectric material for microwave application. The microwave dielectric properties of LaScO3 were obtained as the dielectric permittivity of 24, Q×f of 18,000 GHz, with a temperature coefficient of resonant frequency (TCF) of −69 ppm/°C. Solid solutions and polyphase assemblages were investigated in the LaScO3-TiO2 system as a function of TiO2 content, and correlated with the microwave dielectric properties. Orthorhombic perovskite LaScO3 transformed to tetragonal symmetry with Ti substitution on the B-site of LaScO3 owing to the ionic radius difference between Sc3+ and Ti4+. With this phase transition, the formation of A-site vacancies (VLa‴) resulted in the precipitation of a La deficient secondary phase. The substitution of Ti also affected the dielectric properties. The dielectric constant increased and TCF became less negative with increased TiO2 addition. However, the Q×f value decreased, due to the formation of the secondary phase. For the case of the 0.6LaScO3-0.4TiO2 composition, a dielectric K of 40, Q×f of 6,000 GHz and nearly zero TCF were obtained.

This paper discusses the techniques that are available for characterising circuit materials at microwave and millimetre wave frequencies. In particular, the paper focuses on a new technique for measuring the loss tangent of substrates at mm-wave frequencies using a circular resonant cavity. The benefits of the new technique are that it is simple, low cost, capable of good accuracy and has the potential to work at high mm-wave frequencies.