Book contents
- Frontmatter
- Contents
- Preface
- Part 1 Preliminaries
- Part 2 Combinational logic
- Part 3 Finite-state machines
- 9 Introduction to synchronous sequential circuits and iterative networks
- 10 Capabilities, minimization, and transformation of sequential machines
- 11 Asynchronous sequential circuits
- 12 Structure of sequential machines
- 13 State-identification experiments and testing of sequential circuits
- 14 Memory, definiteness, and information losslessness of finite automata
- 15 Linear sequential machines
- 16 Finite-state recognizers
- Index
13 - State-identification experiments and testing of sequential circuits
from Part 3 - Finite-state machines
Published online by Cambridge University Press: 05 June 2012
- Frontmatter
- Contents
- Preface
- Part 1 Preliminaries
- Part 2 Combinational logic
- Part 3 Finite-state machines
- 9 Introduction to synchronous sequential circuits and iterative networks
- 10 Capabilities, minimization, and transformation of sequential machines
- 11 Asynchronous sequential circuits
- 12 Structure of sequential machines
- 13 State-identification experiments and testing of sequential circuits
- 14 Memory, definiteness, and information losslessness of finite automata
- 15 Linear sequential machines
- 16 Finite-state recognizers
- Index
Summary
In this chapter, we shall be concerned with experimental analysis of the behavior of finite-state machines, test generation for sequential circuits, design for testability, and built-in self-test (BIST).
A machine will be assumed to be reduced, strongly connected, and completely specified. State-identification experiments are designed to identify the unknown initial state of the machine and, whenever such an identification is unnecessary or impossible, to identify the final state of the machine. These experiments are known as distinguishing and homing experiments, respectively. Machine-identification experiments are concerned with the problem of determining whether a given n-state machine is distinguishable from all other n-state machines. This problem is shown to be, under certain conditions, equivalent to the problem of determining whether a given machine is operating correctly.
Test generation methodologies will be presented for sequential circuits under two fault models: functional and stuck-at. A functional fault alters the machine's state table. A stuck-at fault is manifested as a permanent 0, i.e., a stuck-at-0 (s-a-0) fault, or as a permanent 1, i.e., a stuck-at-1 (s-a-1) fault on some line in the circuit, as discussed in Chapter 8. Since there is no direct way to control the present state lines of a sequential circuit or observe its next state lines, sequential test generation is a difficult task. To ease the testing burden, one can use design-for-testability methods, such as scan design, to allow the control and observation of state lines.
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- Information
- Switching and Finite Automata Theory , pp. 431 - 477Publisher: Cambridge University PressPrint publication year: 2009