Book contents
- Frontmatter
- Contents
- Preface
- Part 1 Preliminaries
- Part 2 Combinational logic
- Part 3 Finite-state machines
- 9 Introduction to synchronous sequential circuits and iterative networks
- 10 Capabilities, minimization, and transformation of sequential machines
- 11 Asynchronous sequential circuits
- 12 Structure of sequential machines
- 13 State-identification experiments and testing of sequential circuits
- 14 Memory, definiteness, and information losslessness of finite automata
- 15 Linear sequential machines
- 16 Finite-state recognizers
- Index
11 - Asynchronous sequential circuits
from Part 3 - Finite-state machines
Published online by Cambridge University Press: 05 June 2012
- Frontmatter
- Contents
- Preface
- Part 1 Preliminaries
- Part 2 Combinational logic
- Part 3 Finite-state machines
- 9 Introduction to synchronous sequential circuits and iterative networks
- 10 Capabilities, minimization, and transformation of sequential machines
- 11 Asynchronous sequential circuits
- 12 Structure of sequential machines
- 13 State-identification experiments and testing of sequential circuits
- 14 Memory, definiteness, and information losslessness of finite automata
- 15 Linear sequential machines
- 16 Finite-state recognizers
- Index
Summary
In many practical situations, synchronous circuits lead to more power consumption and delay than asynchronous circuits. Moreover, within large synchronous systems, it is often desirable to allow certain subsystems to operate asynchronously, thereby avoiding some of the problems associated with clocking. In this chapter, we present some of the basic properties of asynchronous sequential circuits and methods for their synthesis.
Modes of operation
Although there are many forms that an asynchronous sequential circuit might take, the one shown in Fig. 11.1 is the most straightforward for a quick understanding of how such a circuit works. Externally, the circuit is characterized by the fact that its inputs can change at any time. Internally, it is characterized by the use of delay elements as memory devices.
The combination of the signals that appear at the primary inputs and delay outputs defines what is called the total state of the circuit. The combination of input signals x1, x2, …, xl is referred to as the input state; the combination of signals at the outputs of the delays, i.e., y1, y2, …, yk, is referred to as the secondary or internal state of the circuit. The output values generated by the combinational logic define the output symbol of the entire circuit as well as the secondary state that the circuit will assume next.
- Type
- Chapter
- Information
- Switching and Finite Automata Theory , pp. 338 - 371Publisher: Cambridge University PressPrint publication year: 2009