Published online by Cambridge University Press: 15 July 1998
Planar metal/semiconductor/metal (PMSM) junctions buried in a SiO2 layer are fabricated using electron beam lithography on a silicon sample. A technique of jump of pixels is used to obtain different sizes of junctions, the smallest having an inter-electrode distance of 5 nm. The current-voltage characteristics and the variation of the junction conductance with the temperature down to 8 K have been studied. At all sizes and for both polarities, the I−V curves correspond to the reverse characteristic of a metal/semiconductor contact. At low bias voltage, the influence of a thin insulator interfacial layer between the metal and the semiconductor has been pointed out. For these junctions, a non-linear low voltage I−V characteristics is observed before the large voltage thermionic emission regime. For the smallest junctions obtained without interfacial oxide layer, a linear I−V characteristic is recovered at low voltage. Their conductance can be lowered by decreasing the temperature.