A sol-gel process incorporating lead acetate trihydrate, barium acetate and titanium isopropoxide as precursors, acetylacetone as a chelating agent, and ethylene glycol as a solvent was used to prepare solid solution (Pb0.5,Ba0.5)TiO3. Water content, annealing temperature and heating rate were varied and the resulting effects on material properties were studied using TGA/DSC, FTIR, FESEM and X-ray diffraction. Crystallization of the perovskite structure occurred at a temperature as low as 450°C. Thin films were prepared by spin coating on (100) MgO using the optimized precursor sol. Pyrolysis and anneal temperatures were varied and the resultant film properties investigated. The pyrolysis temperature used to dry the film was found to strongly affect orientation. Under optimized conditions, highly oriented films were obtained at a crystallization temperature of 600°C.

Retention loss is a significant issue for an application of ferroelectric thin films to high-density non-volatile memory devices. We investigated the polarization retention characteristics of ferroelectric Pb(Zr,Ti)O3 (PZT) thin films which were fabricated on Pt/IrO2/Ir substrates by different deposition methods. In thermally-accelerated retention failure tests, Pb(Zr,Ti)O3 (PZT) films which were prepared by a chmeical solution deposition (CSD) method showed rapid decay of retained polarization charges as the films became thinner down to 1000 Å, while the films which were grown by metal organic chemical vapor deposition (MOCVD) showed relatively large nonvolatile charges at the same thickness. We concluded that in the CSD-grown films, the relatively large interfacial passive layer compared with the MOCVD-grown films had an unfavorable effect on retention behavior. We observed the existence of such interfacial layers by extrapolation of the total capacitance with thickness of the films and the capacitance of this layer was larger in MOCVD-grown films. It means that the possibility of the accumulation of space charges at the interface was reduced, so that less imprint and less retention loss could be observed in the MOCVD-grown films.

Epitaxial BaTiO3 films and BaTiO3/SrTiO3 multilayers were grown by pulsed laser deposition (PLD) on (001)-oriented Nb-doped SrTiO3 (SrTiO3:Nb) substrates. Measurements of the dielectric properties were performed comparing BaTiO3 films and BaTiO3/SrTiO3 multilayers of different number of individual layers, but equal overall thickness. The dielectric loss saturates for a thickness above 300 nm, and linearly decreases with decreasing film thickness below a thickness of 75 nm, and it is independent on the number of multilayers, pointing to some interface effect. The thickness dependence of the dielectric constant of BaTiO3 films and BaTiO3/SrTiO3 multilayers exhibits a change in the linear slope at a thickness of 75 nm. This behavior is explained by the change observed in the morphology at a thickness of 75 nm. In order to explain the thickness dependence of the dielectric constant, two approaches are considered in this paper, viz. a “series capacitor” model and a “dead layer” model.

Strongly (117)-oriented Bi4Ti3O12 (BIT) thin (300 nm in thickness) and thick (900 nm in thickness) films were successfully synthesized from chemical solution and the piezoelectric and ferrelectric properties were studied. The chemical solution of Bi-acetate and Ti-iso-propoxide dissolved in 2-methoxyethanol was spin-coated on Pt(111)/Ti/SiO2/Si(001) substrate, pyrolysed at 450–600 °C and annealed at 600 °C. On 300-nm-thick BIT thin film, Pt top electrodes were deposited through a metal mask by RF-sputtering. For longitudinal piezoelectric displacement measurement in partially unconstraint, 900-nm-thick BIT thick film, an array of disk-shape BIT capacitor cells with Pt top electrode layers standing on the Pt bottom electrode were fabricated by photolithography with the diameter of 80, 50, 30, 20 μm. To recover from plasma damage, post deposition annealing of 300-nm-thick BIT film and post lithograph annealing of 900-nm-thick BIT film were performed, respectively. Longitudinal piezoelectric displacement was measured directly from the Z-feedback and Z-error signals of an AFM piezoscanner head with application of ac electric field at 5 Hz and 1 kHz, respectively between the conductive cantilever tip contacted to the top Pt electrode and the bottom Pt electrode. By the removal of sidewalls of BIT, positive piezoelectric displacement response was measured. The maximum strain was about 0.1 % under bipolar drive (amplitude of 400 kV/cm or 4Ec). From the unipolar driven piezoelectric displacement, piezoelectric coefficient AFM-d33 was measured. The value of AFM-d33 increased to decreasing cell diameter and approached to a somewhat constant value of 12–13 pC/N. Considering the crystalline orientation, this value well corresponds to that of 20 pC/N which were reported previously in single crystal. The result of ferroelectric property measurement was rather contradictory. The values of remanent and saturated polarization Pr=20 and Psat=28 μC/cm2, respectively measured in 300-nm-thick BIT thin film were in good agreement with reported spontaneous polarization Ps=50 μC/cm2 along a-axis with the consideration of measured inclination angle of Ψ=58° between (200) and (117). In 900-nm-thick BIT thick film, on the other hand, measured values of Pr=6–7 μC/cm2 were much poorer than those of the thin film even with the consideration that measurement frequencies were 1 kHz in the thick film and 50 Hz in the thin film, although the films showed (117)-orientation. Measured piezoelectric response may reflect a specific single grain with favorable orientation in a cell, on the other hand, average value of ferroelectric property throughout a cell in the 900-nm-thick BIT thick film having mixed orientation of (117) and (020).

In the present work we have deposited MgO and Ba0.5Sr0.5TiO3 (BST50) thin layers in different sequences to make MgO:BST50 hetero-structured thin films. These films were characterized by X-ray diffraction and found to be highly (100) textured. The figure of merit {(C0-Cv)/(C0.tand)} of the hetero-structured films was found to be higher as compared to pure BST50 films measured at 1 MHz frequency with electric field of 25.3 kV/cm. These films were used to make eight element coupled micro-strip phase shifter and characterized in a frequency range of 13–15 GHz. The high frequency figure of merit (k factor, defined as the ratio of degree of phase shift per dB loss) measured at around 14 GHz with electric field of 333 kV/cm has been markedly improved (around 64.28 °/dB for hetero-structured film as compared to 24.65 °/dB for pure film). Improvement in dielectric properties in a wide frequency range in the MgO:BST are believed to be due to the higher densification of the hetero-structured films.

C axis-oriented Bi4Ti3O12–SrBi4Ti4O15 (B IT-SB Ti) intergrowth epitaxial ferroelectric thin films have been grown by pulsed laser deposition (PLD) method on MgO (001) and SrTiO3 (001) substrates. The epitaxial growth of BIT-SBTi intergrowth thin films were confirmed by X-ray diffraction (XRD) θ-2θ scan, pole figure plots and reciprocal space mappings. The c axis lattice constant of the BIT-SBTi intergrowth thin film is very close to that of made up of regular stacking of one-halves of the unit cells of Bi4Ti3O12 (3.296 nm) and SrBi4Ti4O15 (4.189 nm). The annealed BIT-SBTi thin film on Pt/Ti/SiO2/Si substrate shows intergrowth structure, too, and exhibits superior ferroelectricity that the values of 2Pr and 2Ec are 32.0 μC/cm2 and 190 kV/cm, respectively. The annealed BIT-SBTi film shows that the degradation of switching charge after 1×1010 switching cycles was 16.5%. This ferroelectric enhancement is attributed to strain of pseudo-perovskite layers interacting through Bi2O2 layer. The dielectric constant and dielectric loss of the annealed BIT-SBTi film were 433 and 0.037, respectively.

We have characterized (Sr,Sm)Bi2Ta2O9 (SSBT) films fabricated by the sol-gel technique on Pt/Ti/SiO2/Si substrates. For ferroelectric-gate FET applications, a ferroelectric film which has a small remanent polarization and a relatively large coercive field is required. It is demonstrated that Sm doping in ferroelectric SBT films is effective to reduce the remanent polarization and enhance the coercive field. Sr0.5Sm0.2Bi2.2Ta2O9 films (150nm) crystallized at 850°C exhibits good electrical properties with a remanent polarization of 1.7 μC/cm2 and a coercive fields of 85 kV/cm. These values are suitable for ferroelectric-gate FET applications.

We have studied the influence of partial substitution of Ca (0%, 5%, 10% and 15%) on the structural and electrical properties of SrBi2Nb2O9 (SBN) thin films. Pulsed laser deposition technique was used to grow thin films on platinized silicon substrates. X-ray diffraction data confirmed the polycrystalline nature of the films with preferential orientation along the polarization axis. Incorporation of Ca at Sr-site of SBN reduced the lattice parameter and was attributed to the smaller ionic radii of Ca. The soft mode frequency at 29.5 cm-1 of SBN shifted towards higher wavenumber implied increasing the transition temperature upon Ca substitution. The grain sizes of SBN thin films vary from oval to rod like structures and improving the homogeneous distribution of grains with the increase in Ca contents. The ferroelectric properties of the films enhanced with maximum remanent polarization of 35.3 mC/cm2. The increase in the coercive field with incorporation of Ca at Sr-site was attributed to the higher electronegativity of Ca. The SBN thin films with the incoporation of Ca exhibited poor leakage current behavior. The reduction of dielectric permittivity with Ca concentration was attributed to the lower dielectric permittivity of CaBi2Nb2O9.

a-/b-axis-oriented epitaxial bismuth layer-structured ferroelectric thin films were epitaxially grown on (101)-oriented oxide with rutile structure. The long-range lattice matching between the ferroelectric layer and the bottom rutile layer, particularly the number of rutile units facing one ferroelectric unit and the surface orientation, were discussed for (100)(010)Bi4Ti3O12//(101)TiO2 structure. Cross sectional transmission electron microscope analysis suggests that seven rutile units lie under one a-/b-axis-oriented Bi4Ti3O12 unit with lower misfit dislocation density comparing to eight rutile units by one Bi4Ti3O12 model. Based on this result, the surface orientation at the interface was simulated to give us an appropriate ion alignment model. The titanium layer in the (101)TiO2 structure is most likely to match with the oxygen layer in the a-/b-axis-oriented Bi4Ti3O12 film.

MFMPOS (Metal, Ferroelectrics, Metal, Polysilicon, Oxide, and Silicon) one-transistor (1T) ferroelectric memory devices have been fabricated. However, the yield of 1T-memory devices is lower. We find that the main problems of 1T MFMPOS memory devices are shorts, opens, no memory window, smaller memory windows and blank. In order to solve these problems, we studied the reasons resulted in the problems. Then, the integration processes for one transistor memory device were optimized. Fabrication of nMOSFET 1T memory devices starts with shallow trench isolation (STI) on p-type Si. A gate oxide is thermally grown after p-well implantation. Phosphorus ions were implanted after polysilicon gate definition for the formation of self-aligned source, drain, and n-type floating gate. A damascene process using MOCVD PGO deposition and chemical mechanical polishing (CMP) were used to avoid etching damage. Electrodes for the ferroelectric capacitor, i.e., the floating Ir bottom electrode and Pt top electrode, are deposited by E-Beam evaporation. The area ratio of the top and floating gate electrodes is 1:1. After inter-level dielectric (ILD) deposition, contact etching stops on Pt at gate and on Si at source/drain (S/D) without difficulty because of high etch rate selectively to the Pt. Finally, the high quality 1T memory devices have been made. The one-transistor memory devices showed memory windows around 2 – 3V. The memory windows are almost saturated from operation voltage of 3V. The ratios of “on” state current to the “off” state current are closed to 8 – 9 orders. The one-transistor memory devices also show a very good memory characteristics and retention properties.

c-axis-oriented SrBi2Ta2O9 thin films with various thickness ranging from 20–170 nm were epitaxially grown on (100)SrRuO3 (SrRuO3 is give for the pseudo-cubic unit cell)//(100)SrTiO3 substrates by metalorganic chemical vapor deposition (MOCVD). The relative dielectric constants of these films kept a constant value of about 55 with decreasing film thickness down to 20 nm. The capacitances of these films were almost independent of the applied electric field; change of capacitance for these films on applied electric field from 0 kV/cm to 100 kV/cm was within 0.017 % and tano value was within 1.3 %. The leakage current densities were constant against the film thickness on the order of 10-8 A/cm2 at 150 kV/cm. Surface flatness of these films were also almost the same irrespective of the film thickness. These characteristics are very attractive for high-capacitance condenser application. Therefore, c-axis-oriented BLSF thin films are novel candidates for high-capacitance condenser application having both bias-free and thickness independent characteristics together with the good surface smoothness.

Uniformly a-axis-oriented, epitaxially twinned Bi3.25La0.75Ti3O12 (BLT) thin films having the major spontaneous polarization entirely along the film normal were grown by pulsed laser deposition on yttria-stabilized zirconia-buffered Si(100) substrates covered with very thin SrRuO3 bottom electrodes. Using SrRuO3 bottom electrodes of a specific low thickness in combination with a relatively high growth rate and a high oxygen pressure, the volume fraction of the BLT (100) orientation, which is competing with the BLT (118) orientation, was increased up to 99%. In this way the growth of fully a-axis-oriented BLT epitaxial films was achieved, attaining a remanent polarization of 32 mC/cm2. Initial fatigue experiments indicated hardly any fatigue after 109 switching cycles.

A library of different crystalline sol-gel thin films with a composition of BaxTiyOz (where x = 1,2; y = 1,2,9 and z = 3, 7, 20) has been generated using variable multi-step laser and thermal annealing. Point by point X-ray diffraction characterization revealed the presence of high dielectric (BaTiO3) and low dielectric (Ba2Ti2O7 and Ba2Ti9O20) phases. Appropriate laser and thermal annealing controlled crystallinity, phase content, morphology and dielectric property of libraries. We have extended the process to BaTiO3 based thick-films and investigated the surface morphology of laser-annealed films.

Layer splitting by helium and/or hydrogen and wafer bonding was applied for the transfer of thin single-crystalline ferroelectric oxide layers onto different substrates. The optimum conditions for achieving blistering/splitting after post-implantation annealing were experimentally obtained for LiNbO3, LaAlO3, SrTiO3 single crystals and transparent PLZT ceramic. Under certain implantation conditions large area exfoliation instead of blistering occurs after annealing of as-implanted oxides. Small area single-crystal oxide layer transfer was successfully achieved.

Recent progress in the research of ferroelectric-gate FETs is reviewed mainly from a view-point of the data retention characteristics. First, importance of insulator-inserted gate structures such as an MFIS (M; metal, F; ferroelectric, I; insulator, S; semiconductor) or MFMIS structure is described and the necessary conditions for the insulating buffer layer and the ferroelectric film are discussed. Then, experimental results for the SiO2 and high-k dielectric buffer layers combined with such ferroelectric films as SBT (SrBi2Ta2O9) and BLT ((Bi,La)4Ti3O12) are presented, in which particular attention is paid to the discussion on the induced charge matching between the buffer layer and the ferroelectric film. As an example, it is shown in a Pt/BLT/LaAlO3/Si diode that the high and low capacitance values written by positive and negative pulses can be retained at least for 3 days. Finally, recent experimental results on the data retention characteristics of the ferroelectric-gate FETs are presented.

Due to its high oxidation resistance, TaSiN is a promising candidate as an electrically conductive barrier layer for integration of high permittivity oxides in advanced memory devices. In this work, we report on the properties of TaSiN thin films deposited by reactive magnetron sputtering of a TaSi2 target. We have mainly studied the influence of deposition pressure and power density on film properties (composition, density, resistivity). The oxidation resistance of TaSiN films has been investigated at typical conditions for crystallization of perovskite dielectrics. The as-deposited and annealed samples were characterized using Rutherford backscattering spectroscopy and nuclear reaction analysis for atomic composition and XPS for chemical bonding. To study oxidation resistance, films have been processed in 18O2. The concentration depth profiles of 18O was measured after thermal treatments via the narrow resonances of 18O(p,α)15N at 151 keV (fwhm=100eV). The different results suggest that a pressure of 0.5 Pa, a power density of 2.63W/cm2 and a gas flow ratio N2/Ar of 5% allow to perform TaSiN films with high density, low resistivity and good oxidation resistance.

The crystal structure, surface morphology and electrical properties of PbSiOx (PSO) doped Pb(Zr,Ti)O3 (PZT) thin films were systematically investigated. The starting solutions of PSO-doped PZT were prepared by mixing sol-gel solutions of PZT and PSO. RTA-calcined thin films were crystallized by means of an oxygen partial pressure controlled post-annealing process. After the calcining process, lightly doped PZT thin films containing an amount of PSO dopant less than 1.0 at.% exhibit (111)-preferred orientation, and fine grains having a diameter of 50 nm and column-like structure. As the amount of PSO dopant is increased to 5.0 at.%, the (111) peaks becomes obscure and the (100) peaks together with the minor (110) peaks becomes dominant. The column-like structure changes into a plate-like structure having coarse grains whose diameter exceeds 500 nm. Further increasing the level of PSO dopant to 20.0 at.% causes the appearance of a pyrochlore phase having an extremely smooth surface without apparent grains. On the other hand, after the post-annealing process, the pyrochlore phase seen in the heavily doped PZT remarkably disappears, replaced by a perovskite phase together with PSO. The remnant polarization (Pr) gradually decreases as the amount of PSO dopant increases. The break down voltage, fatigue, imprint and other reliability parameters are improved within the proper doping range.

We report on the layer transfer of thin ferroelectric materials onto silicon substrates. H+ and He+ ion implantation created a buried sacrificial layer in the c-cut BaTiO3 and LiNbO3 single crystals. Bubble formation and thermodynamics of cavity at the bonding interface have been investigated, and single crystal thin film layers were transferred onto crystalline silicon substrates. We have found that defects generated by ion implantation in ferroelectric materials can be significantly recovered with the subsequent annealing for layer splitting.

The Focused Ion Beam Microscope (FIB) has been used to fabricate capacitors from single crystals of BaTiO3 and SrTiO3 with electrode areas ∼200μm2, and thickness of single crystal dielectric between 2μm and 500nm. Cross-sectional transmission electron microscopy revealed that during capacitor fabrication, the FIB rendered around 20nm of dielectric at the electrode-dielectric interface amorphous, associated with local gallium impregnation. Such a region would act electrically in series with the single crystal and would presumably have a considerable negative influence on dielectric properties. However, annealing prior to electrode deposition was found to fully recover the single crystal, and homogenise the gallium profile. Some subsequent dielectric testing of SrTiO3 was performed yielding a room temperature dielectric constant of ∼150 and loss tangent of 0.015 at 100kHz. A technique has therefore been demonstrated which allows fabrication of capacitors in which size-effects in ‘thin-films’ can be studied, without the influence of grain boundaries, and other issues associated with conventional thin film growth.

Double layer (DL) Ba0.7Sr0.3TiO3 (BST) capacitors with Pt electrodes have been fabricated with similar growth conditions on different substrates. The substrates used in the present study were r-plane sapphire, polycrystalline alumina Al2O3 (99.6% and 96%), and glazed polycrystalline alumina. BST films were grown by metal-organic decomposition (MOD) method. By varying the annealing conditions which affects the formation of the crystalline structure, significant changes in the dielectric properties of the BST films have been observed. BST films were characterized by Field Emission Scanning Electron Microscopy (FE-SEM) and Powder X-ray Diffractometer (PXRD). These observations showed that BST films grown at lower temperatures on alumina substrates exhibited the smallest grain size. BST films of the same thickness prepared under the same thermal processing conditions showed higher capacitance when grown on all types of alumina-based substrates compared to those deposited on control SiO2/Si. The higher capacitance on alumina was always associated with larger dissipation factor, and lower or similar leakage current density. The final tuning, of the dielectric properties of BST DL capacitors on non-silicon substrates, was correlated to the initial film formation temperature and post-annealing conditions of the BST films. The leakage current density, of DL BST capacitors fabricated on glazed alumina, becomes smallest when the BST processing temperature was lowered by 100 °C compared to the control SiO2/Si. The typical achieved leakage current density for 1500×1500 μm2 DL capacitors on glazed alumina was 3.8×10-9 A/cm2 at 250 kV/cm (36.5 fF/μm2), about 3 times lower than on SiO2/Si substrates (1.1×10-8 A/cm2 at 250 kV/cm, 31 fF/μm2).