We review recent progress in the growth of siliconon-insulator films by lateral solid phase epitaxy. The temperature dependence of the rates of random crystallization and solid phase epitaxy are used to predict the maximum growth of Si over oxide achievable by this technique. Actual overgrowth distances of 10 μm obtained in UHV-deposited films are considerably less than the values predicted. Several possible causes of the difference between observed and predicted overgrowth are discussed.

SIMOX (Separation by Implanted Oxygen) technology has been developed for realization of oxygen-ion implanted SOI. The distribution of implanted oxygen was analyzed by Auger electron spectroscopy and Rutherford backscattering spectroscopy. The properties of the silicon oxide formed by oxygenion implantation were investigated by infrared spectra, capacitance-voltage characteristics, dielectric strength, and dielectric constants. The crystallinity of the top layer silicon and of the epitaxially-grown silicon layer was deter mined by electron-beam diffraction. An electric-field-shielding effect was observed in the polycrystalline silicon region which was formed between the top layer silicon and the buried oxide. High-speed digital and high-voltage analogue CMOS LSIs, a 1kb CMOS RAM and a BSH LSI, were successfully fabricated using SIMOX technology.

Formation of buried insulating layers and redistribution of impurities during annealing are important processes in new semiconductor device technologies. We have studied pulsed ruby laser and furnace annealing of high dose (D>1017 N/cm2) 50 KeV nitrogen implanted silicon. Using He Back scattering and channeling, X-ray diffraction, transmission electron microscopy, and infrared transmission spectroscopy, we have compared liquid and solid phase regrowth, diffusion, impurity segregation and nitride formation. As has been previously reported, during furnace annealing at or above 1200C nitrogen redistributes and forms a polycrystalline silicon nitride (Si3N4 ) layer. [1–4] In contrast, pulsed laser annealing produces a buried amorphous silicon nitride layer filled with voids or bubbles below a layer of polycrystalline silicon.

Zone melting recrystallization (ZMR) of Si films on SiO2 has produced large-area films with electrical properties approaching those of bulk wafers. The mechanisms of film formation and the use of patterning to control orientation and defect distribution are briefly reviewed. Some examples of the use of patterning are: single-grain films have been produced by means of planar constrictions; subboundaries and impurities have been entrained to lie along straight lines separated by ∼100μm through the use of lithographically defined grating patterns; a vertical-constriction technique has enabled (100) texture to be achieved in 50μm-thick Si films; a lithographically-defined orientation filter, which takes advantage of growth-velocity anisotropy, has been used to select a predetermined azimuthal orientation.

Patterning is also fundamental to graphoepitaxy. Current research emphasizes low temperature processes based on solid-state surface-energy-driven secondary grain growth.

Regular arrays of grain-boundary-free silicon strips several hundred microns long have been produced in a silicon-on-insulator (SOI) structure by using a patterned anti-reflection (AR) coating in combination with seeded oscillatory growth techniques. The AR coating pattern consists of a series of parallel stripes (typically 10 μm wide, separated by 10 μm spaces) starting from a seeding window. A laser beam (typically a 50 μm × 250 μm elliptical beam) is scanned perpendicular to the stripes, with the long axis of the beam parallel to the scan direction. The beam is stepped 1–2 μm between successive scans to advance the single crystal along the direction of the AR stripes. Grain boundaries are confined to the region under the AR stripes. Stereographic analysis of KOH etch pits formed in the single crystal strips has shown that the orientation of the stripes gradually rotates from (001)[110] to (013)[331] as the crystal propagates away from the seed. MOS transistors formed in the single-crystal strips have mobilities comparable to devices formed in bulk films. These mobilities are approximately 20% higher than those found in devices formed in large-grain recrystallized polysilicon films.

The transitional region of subgrain-boundary-free crystal to subgrain-boundary-laced crystal formed during the initial stage of energy-beam induced seeded recrystallization of thin film silicon on an insulator has been examined to study the primary cause of subgrain boundary formation and the conceptual basis of its suppression. Observations include the systematic variation of: facet, cellular, and dendritic features; subgrain boundary directions and spacings; and the stable growth distance as a function of silicon film thickness and energy beam density. A temperature gradient argument based on constitutional supercooling theory has been used to explain these observations. There are indications that an increased thermal gradient at the solidification front can suppress the onset of growth instability for large area, defect free growth of SOI.

Using secondary-ion mass spectroscopy, we have found that oxygen is strongly concentrated at the sub-boundaries in zone-melting-recrystallized silicon-on-insulator films prepared by the graphite-strip-heater technique. This observation suggests that the formation of sub-boundaries during recrystallization may be caused by constitutional supercooling resulting from the presence of oxygen that is dissolved into the molten Si zone from the adjacent SiO2 layers. Since all zone-melting-recrystallized films to date have been bordered by SiO2 layers, regardless of the heating techniques employed, the sub-boundaries almost always present in these films may well have dissolved oxygen as their common origin.

We have studied the influences of substrate orientation and growth direction on laterally seeded recrystallization of poly-crystalline silicon on a SiO2; film through strip electron beam irradiation. We found that growth in a [110] direction produced films with better crystal quality than growth in a [100] direction on a (001) substrate, and that growth in a [211] direction provides better crystal quality than growth in a [011] direction on a (111) substrate. A simple model of the growth interface composed of {111} planes is proposed

The moving-zone melt recrystallization of polysilicon on insulator substrate has been studied with computer simulation methods. The most important parameters such as upper strip heater moving velocity, the power of upper strip heater, substrate temperature were investigated. Generally speaking, temperature profile in multilayer and melt depth of poly-Si are difficult to be visualized, but are still important for recrystallization process. Therefore by using two dimensional finite difference method, a numerical analysis of moving melt zone recrystallization processes has been developed. Through this analysis, the temperature profile in multilayer and melt depth of poly-Si are depicted.

A simple, practical model is developed for cw laser recrystallization of silicon and SOI structures, taking into account spatial variations in optical reflectivity. The power absorption is assumed to be uniform within each of three regions: the central molten spot, the annular two-phase region, and an outer annulus to account for absorption in the solid phase. Analytic expressions are obtained for the radial and depth dependence of the temperature, for the melt depth, the melt radius, the melt threshold, the crystallization threshold and the substrate melt threshold. SOI structures are considered and comparison with some experimental results shows excellent agreement.

We present an overview of the thermal modeling of CW laser induced crystallization of SOI. The dynamical case for a three-layer structure is derived. Effects of the phase change (increase in reflectivity, latent heat) are also treated. Analytical expressions are given and the models are compared to experiment.

Recent progress of SOI growth by electron beam recrystallization is described. Transient temperature profile on the recrystallizing sample surface was analyzed experimentally by direct observation with a thermovision, which is essential for the understanding of crystal growith mechanism. SOI growth was performed by a spot beam annealing and a pseudo-line shaped beam annealing. The line shaped electron beam has been proved to be useful for large area crystallization.

Emphasis was placed on lateral seeded recrystallization of silicon layer evaporated in an ultra high vacuum. Silicon layers with the seed area grown epitaxially during the evaporation and above 1 μm thickness were successfully recrystallized, resulting in reproducible lateral epitaxiy. The pseudo-line shaped electron beam formed by very high frequency oscillation enabled dimensional enlargement of lateral epitaxial growth. crystalline properties were characterized by analyses of Rutherford backscattering and electron channeling pattern.

Silicon-on-insulator films have been formed using a 20 mm by 1 mm line-source electron beam, with sample sweep speeds of 100–500 cm/sec and peak beam power densities up to 75 kW/cm2. Films were formed over 1 and 2 μm thick SiO2 isolating layers on 4°C diameter Si<100> wafers, with stripe openings of 5 to 100 μ width for seeding the crystallization from the substrate. Films consisted of Si layers from 0.4 to 1.0 μm thickness, with a capping layer of 2 μm SiO2. By sweeping the beam parallel to the long axis of the seed openings, smooth, oriented films were obtained, with low-angle grain boundaries confined to midway between seed openings. Best results were obtained for ≲ 50 μm spacing between seed openings.

For the recrystallization of poly-Si films deposited on oxidized Si wafers, we focus our research on lamp and cw laser systems. We have obtained large single-crystal films using both techniques. “Selective annealing” allows localization of the remaining defects in the recrystallized films. Crystallographic as well as electrical characterization confirm the device-worthy potential of this material.

Depletion mode as well as enhancement mode n-channel thin-film transistors (TFT's) have been fabricated in CO2 laser-crystallized silicon on fused quartz. Nearly defect-free islands were obtained by using an offset circular beam to form a tilted melt interface. The optimization of subsequent processing steps to achieve simultaneously low leakage currents and voltage thresholds appropriate for depletion-load NMOS circuits involved adjustments of ion implantation and high temperature cycles with the aid of simulation. The resultant high performance silicon-gate TFT's have led to NMOS ring oscillators with 2.5 ns delay/stage and dynamic shift registers with MHz clock rates. These are the first logic circuits fabricated in beam-crystallized silicon on bulk amorphous substrates.

Data are reported on short-channel MOSFET's fabricated in laser crystallized silicon-on-insulator (SOI) structures. In this experiment, special effort was made to minimize enhanced diffusion of dopants from the source and drain regions along grain boundaries. Instead of the standard anneal used for the implant activation, rapid thermal annealing and low temperature furnace annealing were used. These modified processes yielded functional MOSFET's with channel lengths as short as 1.5 μm, and ring oscillators of 2.0 μm. A speed of 115 ps per stage was obtained in these ring oscillators which is not only the fastest ever reported on any SOI structure, but also a factor of 2 faster than that from the same circuits in bulk Si. The results demonstrate quantitatively the speed improvement of SOI over bulk material due to reduced parasitic capacitance.

Dielectric Isolation (DI) technology has been available for almost twenty years. It was first developed for low capacitance, high speed circuits, and was later adapted to radiation hardened devices and for high voltage isolation. We describe a new method of forming DI structures that simplifies wafer fabrication, reduces the density of process induced defects, and may lead to a more flexible device design. Our process is based on recrystallization from the melt of thick Si films deposited over oxidized Si wafers, with a regular array of seeding windows opened in the isolation oxide. The recrystallized films are free of grain boundaries and subboundaries.

Silicon-on-Insulator (SOI) technologies are becoming more important as CMOS becomes the preferred technology for VLSI. The progress of the three most actively researched SOI technologies, beam-recrystallized SOI, implanted buried oxide and Full Isolation by Porous Oxidized Silicon will be summarized in this paper.

Within the last five years considerable research has focused on techniques to create “device-worthy” crystalline silicon films on insulators. Though several applications for such techniques have been proposed, none is more exciting than the prospect of “3-D Integration”, which has come to mean any IC technology that would yield more than one plane of active devices. This paper reviews the progress to date in this field by critically examining the merits and dismerits of the several silicon film preparation techniques, the several proposed 3-D device structures, and some possible applications of 3-D integration in electronic systems.

Device-worthy films of silicon on SiO2 have been produced using laser annealing and antireflection stripes. If no seeding is used, grain boundaries will be localized beneath the stripes; with seeding, large-area single crystals can be grown, of uniform <100> orientation. N-channel transistors show a mobility of 620 cm2/V.s and present leakage currents which can be reduced, however, down to a few pA/um when the substrate (back gate) is negatively biased to − 5 V. Ring oscillators have also been made, which oscillate with a delay per stage of 1 nsec.