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Process Optimization for Multiple-Pulses Laser Annealing for Boron Implanted Silicon with Germanium Pre-amorphization

Published online by Cambridge University Press:  01 February 2011

Debora Poon ,
Byung Jin Cho ,
Yong Feng Lu ,
Leng Seow Tan ,
Mousumi Bhat  and
Alex See
Debora Poon
Affiliation:
Technology Development Department, Chartered Semiconductor Manufacturing, 60 Woodlands Industrial Park D, Street 2, Singapore 738406.
Byung Jin Cho
Affiliation:
Technology Development Department, Chartered Semiconductor Manufacturing, 60 Woodlands Industrial Park D, Street 2, Singapore 738406.
Yong Feng Lu
Affiliation:
Technology Development Department, Chartered Semiconductor Manufacturing, 60 Woodlands Industrial Park D, Street 2, Singapore 738406.
Leng Seow Tan
Affiliation:
Technology Development Department, Chartered Semiconductor Manufacturing, 60 Woodlands Industrial Park D, Street 2, Singapore 738406.
Mousumi Bhat
Affiliation:
Silicon Nano Device Laboratory and Laser Micro-processing Laboratory, Department of Electrical and Computer Engineering, National University of Singapore, 10 Kent Ridge Crescent, Singapore 119260.
Alex See
Affiliation:
Silicon Nano Device Laboratory and Laser Micro-processing Laboratory, Department of Electrical and Computer Engineering, National University of Singapore, 10 Kent Ridge Crescent, Singapore 119260.
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Abstract

One of the major advantages of multiple-pulses Laser Thermal Annealing (LTA) with moderate energy fluence is that good dopant activation can be achieved without further increases in junction depth by successive pulses. It is demonstrated that when the laser fluence is adjusted to a value that can melt the preamorphization implantation (PAI) layer but not the underlying silicon substrate, PAI layer depths control the junction depths. Hence, it is desirable to operate LTA in this regime since this allows for a tighter process control as opposed to when the junction depth is controlled solely by the laser fluence. High Resolution Transmission Electron Microscopy (HR-TEM) micrographs show that the degree of damage repair depends on the amorphous layer thickness as well as the number of pulses. Our study allows for the evaluation of the maximum allowable PAI depth for a given number of pulses in order to fully remove the damage caused by the PAI.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 765: Symposium D – CMOS Front-End Materials and Process Technology , 2003 , D6.19
Copyright
Copyright © Materials Research Society 2003

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