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Modeling and Fabrication of Quantum Dot Channel Field Effect Transistors Incorporating Quantum Dot Gate

Published online by Cambridge University Press:  18 July 2013

Jun Kondo ,
Murali Lingalugari ,
Pik-Yiu Chan ,
Evan Heller  and
Faquir Jain
Jun Kondo
Affiliation:
ECE Department, University of Connecticut, ITE Building, 371 Fairfield Way, Unit 2157, Storrs, CT 06269, U.S.A.
Murali Lingalugari
Affiliation:
ECE Department, University of Connecticut, ITE Building, 371 Fairfield Way, Unit 2157, Storrs, CT 06269, U.S.A.
Pik-Yiu Chan
Affiliation:
ECE Department, University of Connecticut, ITE Building, 371 Fairfield Way, Unit 2157, Storrs, CT 06269, U.S.A.
Evan Heller
Affiliation:
Synopsys Inc., 400 Executive Boulevard, Ossining, NY 10562, U.S.A.
Faquir Jain
Affiliation:
ECE Department, University of Connecticut, ITE Building, 371 Fairfield Way, Unit 2157, Storrs, CT 06269, U.S.A.
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Abstract

Quantum dot gate (QDG) field-effect transistors (FET) have shown three-state transfer characteristics. Quantum dot channel (QDC) field-effect transistors (FET) have exhibited fourstate ID-VG characteristics. This project aims at studying the effect of incorporating cladded quantum dot layers in the gate region of QDC-FET. Four-state characteristics are explained by carrier transport in narrow energy mini-bands which are manifested in a quantum dot superlattice (QDSL) channel. QDSL is formed by an array of cladded quantum dots (such as SiOx-Si and GeOx-Ge). Multi-state FETs are needed in multi-valued logic (MVL) that can reduce the number of gates and transistors in digital circuits. The fabricated device showed the four-state characteristic (OFF, ‘I1’, ‘I2’, ON).

Keywords

Sisimulationdiffusion
Type
Articles
Information
MRS Online Proceedings Library (OPL) , Volume 1551: Symposium R – Nanostructured Semiconductors and Nanotechnology , 2013 , pp. 149 - 154
Copyright
Copyright © Materials Research Society 2013 

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References

REFERENCES

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