Nanocrystal memories are widely invoked as potential solutions to overcome the scaling limitations of conventional FLASH memories beyond the 80nm technology node. In this study, the deposition of uniform silicon nanocrystals has been developed and optimized in a commercially available vertical furnace, an A400 from ASM.

It has been shown that low pressure chemical vapor deposition (LPCVD) of nanocrystals is feasible in a batch reactor but with a bad size dispersion of the silicon nanocrystals. To improve the size dispersion of the nanocrystals, a novel 2-step process with silane was introduced. In the conventional 1-step process, the oxide surface is exposed to silane at the same partial pressure and temperature during both nucleation and growth of the silicon nanocrystals. In this novel 2-step process, the surface is first exposed briefly to silane at a higher temperature (580–600°C) and following that, the temperature is lowered to allow selective growth on the existing silicon nuclei over the oxide surface. With such an approach, the nucleation step can be separated from the growth step and consequently the size dispersion can be improved by 50%.