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Impact of Various Polysilicon Deposition Process on Thin Gate-Oxide Properties in Submicron CMOS Technology

Published online by Cambridge University Press:  21 February 2011

P. K. Roy ,
T. Kook ,
V. C. Kannan ,
G. J. Felton ,
R. A. Powell  and
A. N. Velaga
P. K. Roy
Affiliation:
AT&T Bell Laboratories
T. Kook
Affiliation:
AT&T Bell Laboratories
V. C. Kannan
Affiliation:
AT&T Bell Laboratories
G. J. Felton
Affiliation:
AT&T Bell Laboratories
R. A. Powell
Affiliation:
AT&T Bell Laboratories
A. N. Velaga
Affiliation:
AT&T Microelectronics 555 Union Boulevard, Allentown, PA
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Abstract

The dielectric quality (defect density, Do and breakdown strength, Fbd) of 150Å SiO2 gate oxide (GOX) films grown by conventional or stacked oxidation scheme are discussed from the leakage measurements of polysilicon capacitors on test structure simulating our submicron CMOS process. Various polysilicon (poly) deposition processes from silane pyrolysis (570°C -620°C) were used by the low pressure chemical vapor deposition (LPCVD) technique. Both in situ and ex situ poly doping by phosphorus (P) were used to ascertain their impact on the GOX properties. The substructural characteristics of the poly/SiO2 and SiO2/Si interfaces generated by various combinations of GOX and poly deposition processes were done by the high resolution TEM lattice fringe technique under phase contrast mode.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 182: Symposium C – Polysilicon Thin Films and Interfaces , 1990 , 281
Copyright
Copyright © Materials Research Society 1990

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