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Effect of annealing ambient on performance and reliability of low pressure chemical vapor deposited oxides for thin film transistors

Published online by Cambridge University Press:  10 February 2011

N. Bhat ,
A. Wang  and
K. C. Saraswat
N. Bhat
Affiliation:
Electrical Engineering Department, CIS, Stanford University, Stanford, CA-94305.
A. Wang
Affiliation:
Electrical Engineering Department, CIS, Stanford University, Stanford, CA-94305.
K. C. Saraswat
Affiliation:
Electrical Engineering Department, CIS, Stanford University, Stanford, CA-94305.
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Abstract

The performance and reliability of low pressure chemical vapor deposited (LPCVD) oxides subjected to oxidizing, inert and nitriding annealing ambients is characterized both at low temperature (600°C) and high temperature (950°C). The oxidizing ambient results in worse initial interface state density and charge to break down. We attribute this to the interfacial stress developed during the oxidation, due to the volume mismatch between Si and SiO2. The C-V measurements on poly-Si substrate capacitors and the charge pumping measurements on poly-Si thin film transistors (TFTs) indicate lower trap density for inert and nitriding ambients. The TFTs with inert anneal exhibit lower bias temperature instability compared to oxidizing ambient.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 424: Symposium H – Flat Panel Display Materials II , 1996 , 287
Copyright
Copyright © Materials Research Society 1997

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