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Device Structures and Charicterization of one Tansistor Ferroelectric Memory Devices

Published online by Cambridge University Press:  01 February 2011

Tingkai Li ,
Sheng Teng Hsu ,
Bruce Ulrich  and
Dave Evans
Tingkai Li
Affiliation:
Sharp Laboratory of America, Inc. 5700 NW Pacific Rim Blvd. Camas, WA [email protected]
Sheng Teng Hsu
Affiliation:
Sharp Laboratory of America, Inc. 5700 NW Pacific Rim Blvd. Camas, WA [email protected]
Bruce Ulrich
Affiliation:
Sharp Laboratory of America, Inc. 5700 NW Pacific Rim Blvd. Camas, WA [email protected]
Dave Evans
Affiliation:
Sharp Laboratory of America, Inc. 5700 NW Pacific Rim Blvd. Camas, WA [email protected]
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Abstract

One-transistor (1T) memory devices with MFIS (Metal, Ferroelectrics, Insulator, Silicon) and MFMIS (Metal, Ferroelectrics, Metal, Insulator, Silicon) structures have been widely studied. These memory devices exhibit memory working functions but very poor retention properties. Three possible mechanisms are responsible for the poor retention of 1 T ferroelectric memories: namely, charges trapping within the gate oxide and ferroelectric film, floating gate effect, and the depolarization field. In order to overcome these problems, a novel ferroelectric transistor design using a semiconductive oxide film in place of the gate dielectric has been fabricated. The device structures are Pt/PGO/InO2/Si (MFSoxS) and Pt/PGO/Ir/InO2/Si (MFMSoxS). There is no insulator in the gate stack. These device structures do not have floating gate and the depolarization field is very low. Therefore, the memory retention time can be very long. In this paper, we report the device structures, integration processes and the working properties with improved retention properties of the Pt/PGO/InO2/Si (MFSoxS) and Pt/PGO/Ir/InO2/Si (MFMSoxS) devices.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 830: Symposium D – Materials and Processes for Nonvolatile Memories , 2004 , D2.10
Copyright
Copyright © Materials Research Society 2005

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References

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