4H SiC is a promising material because of its mechanical, electrical, and physical properties. However, SiC material defects have had a rate limiting effect on the widespread adoption of SiC. Micropipes, basal plane dislocations (BPD), elementary screw dislocations (SDD) and threading edge dislocations (TED) have all been identified as limiting to device operation and/or performance. An ideal PVT strategy for manufacturing SiC crystals would be capable of driving defects out the crystal via a combination of thermal field control and defect dissociation pathways. In this work a PVT technology was realized which is capable of continuously improving the crystal quality. A low defect PVT process was conceived and optimized using iterative experiment and simulation methods. During the maturation of the process it was observed that the crystal defect density repeatedly decreased relative to the seed crystal, as evaluated by x-ray topography, x-ray diffraction, and molten salt etching. The process improvements were leveraged successfully to achieve 4H n+ SiC wafers at 76-100 mm diameter with MPD <1 cm-2, SDD <500 cm-2, and BPD <500 cm-2. This paper will illustrate the defect reduction pathways leading to state of the art defect density 4H SiC crystals and the impact of the improved crystal on epitaxy defects and simple device experiments.