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Characterization of CMOS Devices in 0.5-μm Silicon-On-Sapphire Films Modified by Solid Phase Epitaxy and Regrowth (Spear)

Published online by Cambridge University Press:  21 February 2011

P.K. Vasudev
Affiliation:
Hughes Research Laboratories Malibu, CA
D.C. Mayer
Affiliation:
Hughes Research Laboratories Malibu, CA
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Abstract

Complementary Metal-Oxide-Semiconductor (CMOS) devices and circuits with minimum feature sizes of about 1 μm were fabricated in 0.5-μm-thick epitaxial Silicon-On-Sapphire (SOS) films. The films were modified by ion implantation and subsequent solid phase recrystallization processes which reduced the total microtwin concentrations in the Si layers by more than a hundredfold, while increasing electron and hole channel mobilities between 40 to 50%. Leakage currents were reduced by over 2 orders of magnitude, while drive currents and subthreshold slopes showed significant improvements over as–grown SOS films. Propagation delays of less than 80 psec were obtained for CMOS/SOS inverters with Leff = 0.6 μm.

Type
Research Article
Copyright
Copyright © Materials Research Society 1984

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References

REFERENCES

1. VLSI Laboratory, Texas Instruments Inc., “Technology and design of MOS VLSI,” IEEE J. Solid-State Cir. SC-17, 442448 (June, 1982).Google Scholar
2. Inone, T. and Uoshii, T., ”Crystalline disorder reduction and defect type change in SOS films by Silicon implantation and subsequent thermal annealing”. App. Phys. Lett. 36, 6466 (1980).10.1063/1.91318Google Scholar
3. Amano, J. and Carey, K., ”A three-step process for low defect density silicon-on-sapphire”, App. Phy. Lett. 39, (July, 1980).Google Scholar
4. Schlotterer, H., ”Mechanical and Electrical properties of Epitaxial Silicon on Sapphire”, Solid State Electronics, 11, 947 (1968).Google Scholar