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Advanced Technology Processing and State-of-the-art Solutions to Cleaning, Contamination Control, and Integration Problems

Published online by Cambridge University Press:  15 February 2011

W. W. Abadeer ,
A. LeBlanc ,
A. Kluwe ,
P. Schulz ,
R. Vollertsen ,
V. Penka ,
S. Nadahara ,
A. Antreasyan ,
D. Cote  and
W. Cote
...Show all authors
W. W. Abadeer
Affiliation:
IBM Microelectronics Division, 1000 River St. Essex Junction, VT 05452
A. LeBlanc
Affiliation:
IBM Microelectronics Division, 1000 River St. Essex Junction, VT 05452
A. Kluwe
Affiliation:
Siemens Components, Inc.c/o IBM Microelectronics Division Essex Junction, VT 05452*Hopewell Junction, NY 12533
P. Schulz
Affiliation:
Siemens Components, Inc.c/o IBM Microelectronics Division Essex Junction, VT 05452*Hopewell Junction, NY 12533
R. Vollertsen
Affiliation:
Siemens Components, Inc.c/o IBM Microelectronics Division Essex Junction, VT 05452*Hopewell Junction, NY 12533
V. Penka
Affiliation:
Siemens Components, Inc.c/o IBM Microelectronics Division Essex Junction, VT 05452*Hopewell Junction, NY 12533
S. Nadahara
Affiliation:
Toshiba Corp. c/o IBM Microelectronics Division Hopewell Junction, NY 12533
A. Antreasyan
Affiliation:
IBM Microelectronics Division Hopewell Junction, NY 12533
D. Cote
Affiliation:
IBM Microelectronics Division Hopewell Junction, NY 12533
W. Cote
Affiliation:
IBM Microelectronics Division Hopewell Junction, NY 12533
M. Levy
Affiliation:
IBM Microelectronics Division Hopewell Junction, NY 12533
H. Akatsu
Affiliation:
IBM T. J. Watson Research Center Yorktown Heights, NY 10598
R. Ludeke
Affiliation:
IBM T. J. Watson Research Center Yorktown Heights, NY 10598
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Abstract

Ultraclean semiconductor processes were developed for ULSI technologies to significantly reduce metallics, foreign materials, and to preserve silicon surface morphology. State-of-the-art detection techniques (Elymat, TXRF, VPD, and SPV) were implemented in all critical process sectors. Acceptable levels of metallic contamination were derived from previous experience and from published work on this subject relating metallic contamination levels to gate oxide reliability and retention time.

A comprehensive diagnostic/characterization system was utilized in evaluating a wide variety of test structures emulating key device process interactions. Advanced techniques were employed for measurement of reliability and surface morphology. Also root causes for all integration problems are identified.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 386: Symposium O – Ultraclean Semiconductor Processing Technology and Surface , 1995 , 261
Copyright
Copyright © Materials Research Society 1995

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References

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