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Vertical, Dual Gate CMOS Structure in Two Laser-Recrystallized Silicon Layers over Oxidized Silicon Substrate

Published online by Cambridge University Press:  21 February 2011

P. Kenyon ,
H. Dressel  and
A. Negri
P. Kenyon
Affiliation:
GTE Laboratories Incorporated40 Sylvan Road Waltham, MA 02254
H. Dressel
Affiliation:
GTE Laboratories Incorporated40 Sylvan Road Waltham, MA 02254
A. Negri
Affiliation:
GTE Laboratories Incorporated40 Sylvan Road Waltham, MA 02254
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Abstract

A seven mask CMOS process that provides vertically integrated structures with joint gates is described. The structures have been characterized as individual NMOS and PMOS transistors. An implant technique will be described which may permit the fabrication of fully self-aligned CMOS structures.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 33: Symposium D – Comparison of Thin Film Transistor and SOI Technologies , 1984 , 155
Copyright
Copyright © Materials Research Society 1984

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References

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