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Properties of Tin Thin Films Deposited by Alcvd as Barrier for Cu Metallization

Published online by Cambridge University Press:  17 March 2011

Alessandra Satta ,
Gerald Beyer ,
Karen Maex ,
Kai Elers ,
Suvi Haukka  and
A. Vantomme
Alessandra Satta
Affiliation:
IMEC, Kapeldreef 75, B-3001 Leuven, Belgium
Gerald Beyer
Affiliation:
IMEC, Kapeldreef 75, B-3001 Leuven, Belgium
Karen Maex
Affiliation:
Also at E. E. Dept., K. U. Leuven, Belgium
Kai Elers
Affiliation:
ASM Microchemistry, Kutojantie 2B, P.O. Box 132, FIN-02631 Espoo, Finland
Suvi Haukka
Affiliation:
ASM Microchemistry, Kutojantie 2B, P.O. Box 132, FIN-02631 Espoo, Finland
A. Vantomme
Affiliation:
IKS, K. U. Leuven, Celestijnenlaan 200 D, B-3001 Leuven, Belgium
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Abstract

In advanced multi-level metallization schemes, the application of copper as interconnect metal requires the prevention of Cu diffusion into the active area and into interlevel dielectrics by total encapsulation of Cu with barrier films. Critical requirements for diffusion barriers are very small thicknesses, low resistivity, low deposition temperature and conformality on high aspect ratio trenches and vias. For this application, we have studied TiN films deposited by atomic layer chemical vapour deposition (ALCVD) at 400°C and 350°C. This paper discusses the ALCVD TiN films properties and compares them to the properties of TiN deposited by ionized physical vapour deposition (I-PVD).

The ALCVD TiN deposited at 400°C exhibits a resistivity comparable to I-PVD TiN resistivity. However, the ALCVD films deposited at 350°C show higher resistivity. The Cl residue in ALCVD films is 1.5% at 400°C and 3% at 350°C. The microstructure is fine-grained. A very high level of conformality on trenches characterizes the ALCVD TiN films. We believe this property gives a clear advantage over the sputtered I-PVD TiN since its coverage in high aspect ratio trenches and vias is expected to be limited for the future devices interconnection scheme.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 612: Symposium D – Materials, Technology & Reliability for Advanced Interconnects.. , 2000 , D6.5.1
Copyright
Copyright © Materials Research Society 2000

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References

1. Murarka, P., Multilevel Interconnections for ULSI and GSI era, Material Science and Engineering, R19, 87 (1997).Google Scholar
2. Suntola, T., Atomic Layer Epitaxy, Handbook of Crystal Growth, 3, 601, edited by Hurle, D. T. J. (1994).Google Scholar
3. Felix, P., Interconnect for ULSI: State of art and future trends, ESSDERC 1995. Proceedings of the 25th European Solid State Device Research Conference. p. 5 (1995).Google Scholar
4. Hamamura, H., Yamamoto, R., Takahiro, K., Yamaguchi, S., Komiyama, H., Shimogaki, Y., Advanced Metallization Conference in 1998, Materials Research Society, 345 (1998).Google Scholar
5. Loke, A. L. S., Ryu, C., Yue, C. P., Cho, J. S. H., Wong, S. S., IEEE Electron device letters, vol.17, No 12, (1996)10.1109/55.545766Google Scholar