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Modeling and Mapping of Nanotopography Interactions with CMP

Published online by Cambridge University Press:  01 February 2011

Brian Lee ,
Duane S. Boning ,
Winthrop Baylies ,
Noel Poduje  and
John Valley
Brian Lee
Affiliation:
Massachusetts Institute of Technology, Cambridge MA;
Duane S. Boning
Affiliation:
Massachusetts Institute of Technology, Cambridge MA;
Winthrop Baylies
Affiliation:
BayTech Group, Weston MA;
Noel Poduje
Affiliation:
ADE Corporation, Westwood MA; 4ADE Phase-Shift, Tucson AZ
John Valley
Affiliation:
ADE Corporation, Westwood MA; 4ADE Phase-Shift, Tucson AZ
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Abstract

As the demand for planarity increases with advanced IC technologies, nanotopography has arisen as an important concern in shallow trench isolation (STI) chemical mechanical polishing (CMP) processes. Previous work has shown that nanotopography, or small surface height variations on raw wafers 20 to 50 nm in amplitude extending across millimeter scale lateral distances, can result in substantial CMP-induced localized thinning of surface films such as oxides or nitrides used in STI [1]. This interaction with CMP depends both on characteristics of the wafer such as heights and spatial wavelengths of the nanotopography, and characteristics of the CMP process including the planarization length or pad stiffness.

In this paper we review and extend the previous work on modeling of nanotopography. Three approaches to predicting the post-CMP oxide thinning due to nanotopography are compared. The first approach is the simplest, where a statistical aggregate effect is computed. Following the work of Schmolke [2], a transfer coefficient α is found which captures the portion of the nanotopography that is correlated with the final oxide thinning. The second approach is the most detailed, depending on explicit numerical simulation of pad elastic properties. In this case, a contact wear simulation is used to produce a detailed map of oxide thickness corresponding to any given pre-measured nanotopography wafer surface. The third approach is a signal processing method, sitting somewhere between the previous two extremes in terms of approximation and complexity. In this last case, a two-dimensional transfer function is extracted which captures the spatial smoothing accomplished by CMP. This filter can then be applied efficiently to premeasured nanotopography maps for other wafers to predict the final oxide thicknesses.

We also propose a predictive mapping of post-CMP oxide or nitride thicknesses to provide insight into the relative goodness of a wafer measured for nanotopography which is to be subjected to a CMP process. Specifically, we suggest that for post-CMP impact, maps and computation of areas having insufficient oxide clearing, or having final nitride thickness outside of required ranges, are useful and practical. Such device failure potential maps complement the fundamental nanotopography height map data and metrics based directly on that data, and enable evaluation, comparison, and development of improved wafers and STI CMP processes.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 732: Symposium I – Chemical-Mechanical Planarization , 2002 , I1.5
Copyright
Copyright © Materials Research Society 2002

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References

1. Lee, B., Boning, D. S., Baylies, W., Poduje, N., Hester, P., Xia, Y., Valley, J., Koliopoulos, C., Hetherington, D., Sun, H., and Lacy, M., “Wafer Nanotopography Effects on CMP: Experimental Validation of Modeling Methods,” MRS Spring Meeting, Apr. 2001.Google Scholar
2. Schmolke, R., Deters, R., Thieme, P., Pech, R., Schwenk, H., and Diakourakis, G., “On the Impact of Nanotopography of Silicon Wafers on Post-Chemical Mechanical Polished Oxide Layers,” J. Electrochem. Soc., vol. 149, no.4, pp. G257–G265, 2002.Google Scholar
3. Lee, B., Gan, T., Boning, D. S., Hester, P., Poduje, N., and Baylies, W., “Nanotopography Effects on Chemical Mechanical Polishing for Shallow Trench Isolation,” Advanced Semiconductor Manufacturing Conference, Sept. 2000.Google Scholar
4. Xu, S., “Effects of Silicon Front Surface Topography on Silicon Oxide Chemical Mechanical Planarization,” Electrochem. and Sol. State Lett., vol. 1, no. 4, pp. 181–182, 1998.Google Scholar
5. Chekina, O. G. and Keer, L. M., “Wear-Contact Problems and Modeling of Chemical Mechanical Polishing,” J. Electrochem. Soc., vol. 145, no. 6, pp. 2100–2106, June 1998.Google Scholar
6. Yoshida, T., “Three-Dimensional Chemical Mechanical Polishing Process Model by BEM,” Proc. ECS Conf., Oct. 1999.Google Scholar
7. Ouma, D., Modeling of Chemical Mechanical Polishing for Dielectric Planarization, Ph.D. Thesis, MIT, Nov. 1998.Google Scholar
8. Ouma, D., Boning, D., Chung, J., Shinn, G., Olsen, L., and Clark, J., “An Integrated Characterization and Modeling Methodology for CMP Dielectric Planarization,” International Interconnect Technology Conference, San Francisco, CA, June 1998.Google Scholar