Hostname: page-component-586b7cd67f-tf8b9 Total loading time: 0 Render date: 2024-11-20T06:35:21.188Z Has data issue: false hasContentIssue false
  • English
  • Français

Indium Gallium Arsenide Based Non-Volatile Memory Devices with Site-Specific Self-Assembled Germanium Quantum Dot Gate

Published online by Cambridge University Press:  01 February 2011

Pik-Yiu Chan ,
Mukesh Gogna ,
Ernesto Suarez ,
Fuad Alamoody ,
Supriya Karmakar ,
Barry Miller ,
John Ayers  and
Faquir Jain
Pik-Yiu Chan
Affiliation:
[email protected], University of Connecticut, Electrical and Computer Engineering, Storrs, Connecticut, United States
Mukesh Gogna
Affiliation:
[email protected], University of Connecticut, Electrial & Computer Engineering, Storrs, Connecticut, United States
Ernesto Suarez
Affiliation:
[email protected], University of Connecticut, Electrical and Computer Engineering, Storrs, Connecticut, United States
Fuad Alamoody
Affiliation:
[email protected], University of Connecticut, Electrial & Computer Engineering, Storrs, Connecticut, United States
Supriya Karmakar
Affiliation:
[email protected], University of Connecticut, Electrical and Computer Engineering, Storrs, Connecticut, United States
Barry Miller
Affiliation:
[email protected], University of Connecticut, Electrical and Computer Engineering, Storrs, Connecticut, United States
John Ayers
Affiliation:
[email protected], University of Connecticut, Electrical and Computer Engineering, Storrs, Connecticut, United States
Faquir Jain
Affiliation:
[email protected], University of Connecticut, Electrial & Computer Engineering, Storrs, Connecticut, United States
Get access

Abstract

This paper presents the implementation of indium gallium arsenide field-effect transistors (InGaAs FETs) as non-volatile memory using lattice-matched II-VI gate insulator and quantum dots of GeOx-cladded Ge as the floating gate. Studies have been done to show the ability of II-VI materials to act as a tunneling gate material for InGaAs based FETs, and GeOx-cladded Ge quantum dots having the ability to store charges in the floating gate of a memory device. Proposed structure of the InGaAs device is presented.

Keywords

memoryself-assemblyII-VI
Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 1250: Symposium G – Materials and Physics for Nonvolatile Memories II , 2010 , 1250-G01-05
Copyright
Copyright © Materials Research Society 2010

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

1 Jain, F.C., Suarez, E., Gogna, M., Al-Amoody, F., Butkiewicus, D., Hohner, R., Liaskas, T., Karmakar, S., Chan, P.-Y., Miller, B., Chandy, J., and Heller, E., J. Electron. Mater. 38, 1574 (2009).10.1007/s11664-009-0755-xGoogle Scholar
2 Tiwari, S., Rana, F., Chan, K., H, Hanafi, Chan, W., and Buchanan, D., IEDM Proc., 521 (1995).Google Scholar
3 Jain, F.C., Heller, E., Karmakar, S., and Chandy, J., Proc. International Semiconductor Device Research Symposium, Dec. 12–15, College Park, MD (2007).Google Scholar
4 Velampati, R. and Jain, F.C., NSTI Nanotech, Santa Clara, CA, May 20–24 (2007).Google Scholar
5 Gogna, M., Al-Amoody, F., Karmakar, S., Papadimitrakopoulos, F., and Jain, F., Proc. Nanoelectron Devices for Defense and Security Conference, Sept 28 – Oct 2, Fort Lauderdale, FL (2009)Google Scholar
6 Hasaneen, E.-S., Heller, E., Bansal, R., and Jain, F., Solid State Electron. 48, 2055 (2004).10.1016/j.sse.2004.05.073Google Scholar