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Hot-Wire Deposited Amorphous Silicon Thin-Film Transistors

Published online by Cambridge University Press:  10 February 2011

R. E. I. Schropp
Affiliation:
Debye Institute, Department of Atomic and Interface Physics, Utrecht University, P.O. Box 80 000, 3508 TA Utrecht, The Netherlands
K. F. Feenstra
Affiliation:
Debye Institute, Department of Atomic and Interface Physics, Utrecht University, P.O. Box 80 000, 3508 TA Utrecht, The Netherlands
C. H. M. Van Der Werf
Affiliation:
Debye Institute, Department of Atomic and Interface Physics, Utrecht University, P.O. Box 80 000, 3508 TA Utrecht, The Netherlands
J. Holleman
Affiliation:
MESA Research Institute, Department of Electrical Engineering, University of Twente, P.O. Box 217, 7500 AE Enschede, The Netherlands
H. Meiling
Affiliation:
Debye Institute, Department of Atomic and Interface Physics, Utrecht University, P.O. Box 80 000, 3508 TA Utrecht, The Netherlands
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Abstract

We present the first thin film transistors (TFTs) incorporating a low hydrogen content (5 - 9 at.-%) amorphous silicon (a-Si:H) layer deposited by the Hot-Wire Chemical Vapor Deposition (HWCVD) technique. This demonstrates the possibility of utilizing this material in devices. The deposition rate by Hot-Wire CVD is an order of magnitude higher than by Plasma Enhanced CVD. The switching ratio for TFTs based on HWCVD a-Si:H is better than 5 orders of magnitude. The field-effect mobility as determined from the saturation regime of the transfer characteristics is still quite poor. The interface with the gate dielectric needs further optimization. Current crowding effects, however, could be completely eliminated by a H2 plasma treatment of the HW-deposited intrinsic layer. In contrast to the PECVD reference device, the HWCVD device appears to be almost unsensitive to bias voltage stressing. This shows that HW-deposited material might be an approach to much more stable devices.

Type
Research Article
Copyright
Copyright © Materials Research Society 1997

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