Hostname: page-component-78c5997874-dh8gc Total loading time: 0 Render date: 2024-11-19T07:33:20.478Z Has data issue: false hasContentIssue false
  • English
  • Français

Formation of NiSi-Silicided p + n Shallow Junctions Using Implant Through Silicide and Low Temperature Furnace Annealing

Published online by Cambridge University Press:  01 February 2011

Chao-Chun Wang ,
Chiao-Ju Lin  and
Mao-Chieh Chen
Chao-Chun Wang
Affiliation:
Department of Electronics Engineering, National Chiao-Tung University 1001 Ta Hsueh Road, Hsinchu 300, Taiwan
Chiao-Ju Lin
Affiliation:
Department of Electronics Engineering, National Chiao-Tung University 1001 Ta Hsueh Road, Hsinchu 300, Taiwan
Mao-Chieh Chen
Affiliation:
Department of Electronics Engineering, National Chiao-Tung University 1001 Ta Hsueh Road, Hsinchu 300, Taiwan
Get access

Abstract

NiSi-silicided p+n shallow junctions are fabricated using BF2+ implantation into/through thin NiSi silicide layer (ITS technology) followed by low temperature furnace annealing (from 550 to 800°C). The NiSi film agglomerates following a thermal annealing at 600°C, and may result in the formation of discontinuous islands at a higher temperature. The incorporation of fluorine atoms in the NiSi film can retard the formation of film agglomeration and thus improve the film's thermal stability. A forward ideality factor of about 1.02 and a reverse current density of about 1nA/cm2 can be attained for the NiSi(310Å)/p+n junctions fabricated by BF2+ implantation at 35 keV to a dose of 5×1015cm-2 followed by a 650°C thermal annealing; the junction formed is about 60nm measured from the NiSi/Si interface. Activation energy measurements show that the reverse bias junction currents are dominated by the diffusion current, indicating that most of the implanted damages can be recovered after annealing at a temperature as low as 650°C.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 765: Symposium D – CMOS Front-End Materials and Process Technology , 2003 , D6.21
Copyright
Copyright © Materials Research Society 2003

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

1. Deng, F., Johnson, R. A., Asbeck, P. M., Lau, S. S., Dubbelday, W. B., Hsiao, T., and Woo, J., J. Appl. Phys. 81, 8047 (1997).Google Scholar
2. Morimoto, T., Momose, H. S., Iinuma, T., Kunishima, I., Suguro, K., Okana, H., Katakabe, I., Nakajima, H., Tsuchiaki, M., Ono, M., Katsumata, Y., and Iwai, H., IEDM Tech. Digest (1991), p.653.Google Scholar
3. Ohguro, T., Nakamura, S., Koike, M., Morimoto, T., Nishiyama, A., Ushiku, Y., Yoshitomi, T., Ono, M., Saito, M., and Iwai, H., IEEE Trans. Electron Devices ED-41, 2305 (1994).Google Scholar
4. Ohguro, T., Nakamura, S., Morifuji, E., Ono, M., Yoshitomi, T., Saito, M., Momose, H.S., and Iwai, H., IEDM Tech. Digest (1995), p.453.Google Scholar
5. Morimoto, T., Ohguro, T., Momose, S., Iinuma, T., Kunishima, I., Suguro, K., Katakabe, I., Nakajima, H., Tsuchiaki, M., Ono, M., Katsumata, Y., and Iwai, H., IEEE Trans. Electron Devices ED-42, 915 (1995).Google Scholar
6. Xu, D. X., Das, S. R., Peters, C. J., and Erickson, L. E., Thin Solid Films 326, 143 (1998).Google Scholar
7. Poon, M. C., Deng, F., Chan, M., Chan, W. Y., and Lau, S. S., Appl Surf. Sci, 157, 29 (2000).Google Scholar
8. Lauwers, A., Steegen, A., Potter, M. de, Lindsay, R., Satta, A., Bender, H., and Maex, K., J. Vac. Sci. Technol. B19, 2026 (2001).Google Scholar
9. Murarka, S. P., Silicides for VLSI Applications, Academic, New York (1983)Google Scholar
10. Tsuchiya, Y., Tobioka, A., Nakatsuka, O., Ikeda, H., Sakai, A., Zaima, S., and Yasuda, Y., Jpn. J. Appl. Phys. 41, 2450 (2002).Google Scholar
11. Xiang, Q., Woo, C., Paton, E., Foster, J., Yu, B., and Lin, M. R., Symposium on VLSI Technology Digest (2000), p.76.Google Scholar
12. Chau, R., Kavalieros, J., Roberds, B., Schenker, R., Lionberger, D., Barkage, D., Doyle, B., Arghavani, R., Murtht, A., and Deewy, G., IEDM Tech. Digest (2000), p.45.Google Scholar
13. Lee, P. S., Pey, K. L., Mangelinck, D., Ding, J., Wee, A. T. S., and Chan, L., IEEE Electron Device Lett. EDL-21, 566 (2000).Google Scholar
14. Mukai, R., Ozawa, S., and Yagi, H., Thin Solid Films 270, 567 (1995).Google Scholar
15. Tsai, M. Y., and Streetman, B. G., J. App. Phys. 50, 183 (1979).Google Scholar
16. Lau, S. S. and Cheung, N.W., Thin Solid Films 71, 117 (1980).Google Scholar
17. Julies, B. A., Knoesen, D., Pretorius, R., and Adams, D., Thin Solid Films 347, 201 (1999).Google Scholar
18. Tsui, B. Y., Tsai, J. Y., Wu, T. S., and Chen, M. C., IEEE Trans. Electron Devices ED-40, 54 (1993).Google Scholar
19. Nolan, T. P., Sinclar, R., and Beyers, R., J. Appl. Phys, 71, 720 (1992).Google Scholar
20. Brown, A. A., Moynagh, P. B., and Rosser, P. J., Semiconductor Silicon 13, 280 (1989).Google Scholar
21. Chen, B. S., and Chen, M. C., J. Appl. Phys. 72, 4619 (1992).Google Scholar