Hostname: page-component-586b7cd67f-t7czq Total loading time: 0 Render date: 2024-11-29T07:28:11.961Z Has data issue: false hasContentIssue false

Epitaxial Alignment of as Implanted Polysilicon Emitters

Published online by Cambridge University Press:  28 February 2011

J.L. Hoyt
Affiliation:
Stanford Electronics Laboratories, Stanford, CA 94305
E.F. Crabbé
Affiliation:
Stanford Electronics Laboratories, Stanford, CA 94305
J.F. Gibbons
Affiliation:
Stanford Electronics Laboratories, Stanford, CA 94305
R.F.W. Pease
Affiliation:
Stanford Electronics Laboratories, Stanford, CA 94305
Get access

Abstract

We demonstrate a clear advantage for high-temperature, short time annealing to induce intentional, complete epitaxial alignment of arsenic implanted, 0.5 μm-thick polysilicon films on (100) silicon, while minimizing arsenic outdiffusion into the substrate. Using MeV ion channeling and cross-sectional electron microscopy, epitaxial alignment was studied in the 1050-1150 °C temperature range, for arsenic doping concentrations between 1 and 10 × 1020 cm−3. The alignment efficiency increases dramatically with chemical arsenic concentration in this range. An arsenic concentration of 1020 cm−3 yields alignment behavior which proceeds from the polysilicon/single-crystal interface. Between 1 and 5 × 1020 cm×3, the random grain growth can exceed the rate of alignment, and large grain, highly oriented polycrystalline films can result from the RTA. For 0.5 μm-thick polysilicon films with an average doping of 1021 cm×3, the rate of achievement of a high degree of epitaxial alignment exceeds the rate of arsenic penetration into the substrate at temperatures ≥ 1150 °C.

Bipolar transistors with 0.5 μm-thick emitter contacts and polysilicon dopings of 5 and 10 × 1020 cm×3 show less variation in base current when subjected to RTA (T ≥ 1100 °C) compared to devices annealed in a furnace in the 900 to 1000 °C range, while retaining the advantage over metal contacts.

Type
Research Article
Copyright
Copyright © Materials Research Society 1987

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

1. Wong, C.Y., Michel, A.E., Isaac, R.D., Kastl, R.H., and Mader, S.R., J. Appl. Phys., 55 (4), 1131 (1984).Google Scholar
2. Bravman, J.C., Patton, G.L., and Plummer, J.D., J. Appl. Phys., 57 (8), 2779 (1985).Google Scholar
3. Patton, G.L., Bravman, J.C., and Plummer, J.D., IEEE Trans. Electron Devices, ED-33, 1754 (1986).Google Scholar
4. Crabbé, E., Swirhun, S., del Alamo, J., Pease, R.F.W., and Swanson, R.M., 1986 Intl. Elect. Dev. Meeting Tech. Dig. (IEEE, New York, 1986), p. 28.Google Scholar
5. Takemura, H., et al. , 1986 IEDM Tech. Dig. (IEEE, New York, 1986), p. 424.Google Scholar
6. Tsaur, B.Y. and Hung, L.S., Appl. Phys. Lett., 37, 648 (1980).Google Scholar
7. Harrison, H.B., Wong, C., Komem, Y., and Cohen, S., Mat. Res. Soc. Symp. Proc. Vol 71, (Materials Research Society, Pittsburgh, 1986), p. 455.Google Scholar
8. Natsuaki, N., Tamura, M., Miyazki, T., and Yanagi, Y., Intl. Elect. Dev. Meeting Tech. Dig. (IEEE, New York, 1983), p. 662.Google Scholar
9. Tamura, M., Natsuaki, N., Aoki, S., Jap. Journal Appl. Phys., 24 (2), L151 (1985).Google Scholar
10. Hoyt, J.L. and Gibbons, J.F., Mat. Res. Soc. Symp. Proc. Vol. 52, (Materials Research Society, Pittsburh, 1986), p. 15.Google Scholar
11. Crabbé, E., et al. , to be published in Tech. Dig. of the 1987 Symp. on VLSI Technology, (Karuizawa, Japan, 1987).Google Scholar