Hostname: page-component-78c5997874-94fs2 Total loading time: 0 Render date: 2024-11-05T08:46:52.221Z Has data issue: false hasContentIssue false
  • English
  • Français

Comparison of the Growth Kinetics of Oxides Grown in Tungsten-Halogen and Water Cooled Arc Lamp Systems

Published online by Cambridge University Press:  28 February 2011

C.A. Paz de Araujo ,
J.C. Gelpey ,
Y.P. Huang  and
R. Kwor
C.A. Paz de Araujo
Affiliation:
Microelectronics Research Laboratories, Univ. of Colorado at Colorado Springs.
J.C. Gelpey
Affiliation:
Eaton Corporation, Danvers, MA.
Y.P. Huang
Affiliation:
Department of Elect. Engr., Fudan University, Shanghai, P.R.C.
R. Kwor
Affiliation:
Dept. of Elect. Engr., Univ. of Notre Dame, IN. 46556
Get access

Abstract

Rapid thermal oxidation of silicon has been performed in a tungsten-halogen system (AG-410) and a water-wall arc lamp system (Eaton ROA-400). Growth kinetics of the oxides are studied with particular attention to ramp-up ambient conditions, dwell time, maximum wafer temperature and difference in activation energies. These parameters are characterized using ellipsometry in order to measure system bias with respect to growth rate and breakdown. Experiments were designed to identify the differences in the initial enhanced growth conditions, and their effect on growth kinetics during the dwell cycle.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 92: Symposium B – Rapid Thermal Processing of Electronic Materials , 1987 , 133
Copyright
Copyright © Materials Research Society 1987

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

1. Sedwick, T., in Reduced Temperature Processing for VLSI, edited by Reif, R. and Srinivason, G.R. (Electrochemical Soc., Pennington, NJ), Proc. Vol. 86–5, pp. 49 57;Google Scholar
1a. Finn, M.A. and Coe, M.E.,Reduced Temperature Processing for VLSI ., pp. 85 94.Google Scholar
2. Gelpey, J.C., Stump, P.O. and Capolidupo, R.A., in Rapid Thermal Processing, edited by Sedwick, T.O., Seidel, T.E. and Bor-Yeu Tsaur (Materials Research Society, Pittsburgh, PA, 1986), Symp. Proc. Vol. 52, pp. 321 325;Google Scholar
2a. Nulman, J., Krusius, J.P. and Renteln, P., Reduced Temperature Processing for VLSI., pp. 341 348;Google Scholar
2b. Weinberg, Z.A., Nguyen, T.N., Cohen, S.A. and Kalish, R., Reduced Temperature Processing for VLSI., pp. 327 332.Google Scholar
3. Nulman, J., Krusius, J.P. and Gat, A.; IEEE Elec. Dev. Lett., EDL-6 (5), P. 205 (1985).Google Scholar
4. Wouters, D., Avau, D., Mertens, P. and Maes, H.E., in Rapid Thermal Processing, edited by Sedwich, T.O., Seidel, T.E. and Bor-Yeu Tsaur (Materials Research Society, Pittsburgh, PA, 1986), Symp. Proc. Vol 52, pp. 217 223.Google Scholar
5. Nulman, J., Abstract No. 392, 169th Meeting of the Electrochem. Soc. (1986).Google Scholar
6. Paz de Araujo, C.A. and Huang, Y.P., to be published.Google Scholar