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Co-Implantation of Si And Be in GaAs by Rapid Thermal Annealing

Published online by Cambridge University Press:  28 February 2011

Tan-Hua Yu  and
Sujane Wang
Tan-Hua Yu
Affiliation:
General Electric Company, Electronics Laboratory, Electronics Parkway, Syracuse, New York 13221
Sujane Wang
Affiliation:
General Electric Company, Electronics Laboratory, Electronics Parkway, Syracuse, New York 13221
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Abstract

A buried p-layer in GaAs MESFET channel is successfully formed by (Si,Be) co-implantation and rapid thermal annealing process. The annealing cycle is optimized to activate Si and Be simultaneously and to minimize the dopant redistribution for precise dopant control. As a result, more than 80% activation efficiency for both Si and Be, as well as the greatly improved doping abruptness from 85 nm/decade to 65 nm/decade are achieved. Devices are fabricated and superior performance including sharper pinchoff, an increase of RF gain by 2–3dB and a 40% decrease in backgating effect is observed.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 92: Symposium B – Rapid Thermal Processing of Electronic Materials , 1987 , 411
Copyright
Copyright © Materials Research Society 1987

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References

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