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Device processing and junction formation needs for ultra-high power Ga2O3 electronics

Published online by Cambridge University Press:  29 January 2019

Fan Ren
Affiliation:
Department of Chemical Engineering, University of Florida, Gainesville FL 32611, USA
J.C. Yang
Affiliation:
Department of Chemical Engineering, University of Florida, Gainesville FL 32611, USA
Chaker Fares
Affiliation:
Department of Chemical Engineering, University of Florida, Gainesville FL 32611, USA
S.J. Pearton*
Affiliation:
Department of Materials Science and Engineering, University of Florida, Gainesville FL 32611, USA
*
Address all correspondence to S.J. Pearton at [email protected]
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Abstract

A review is given of the future device processing needs for Ga2O3 power electronics. The two main devices employed in power converters and wireless charging systems will be vertical rectifiers and metal oxide semiconductor field effect transistors (MOSFETs). The rectifiers involve thick epitaxial layers on conducting substrates and require stable Schottky contacts, edge termination methods to reduce electric field crowding, dry etch patterning in the case of trench structures, and low resistance Ohmic contacts in which ion implantation or low bandgap interfacial oxides are used to minimize the specific contact resistance. The MOSFETs also require spatially localized doping enhancement for low source/drain contact resistance, stable gate insulators with acceptable band offsets relative to the Ga2O3 to ensure adequate carrier confinement, and enhancement mode capability. Attempts are being made to mitigate the absence of p-type doping capability for Ga2O3 by developing p-type oxide heterojunctions with n-type Ga2O3. Success in this area would lead to minority carrier devices with better on-state performance and a much-improved range of functionality, such as p-i-n diodes, Insulated Gate Bipolar Transistors, and thyristors.

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Prospective Articles
Copyright
Copyright © Materials Research Society 2019 

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