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Copper Metallization Technology for Deep Submicron ULSIs

Published online by Cambridge University Press:  29 November 2013

Y. Arita ,
N. Awaya ,
K. Ohno  and
M. Sato
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Extract

Investment in high-performance and large-scale integration (LSI) has been increasing and low-cost fabrication equipment, simple processing, and short turnaround are big concerns. The propagation delay time in a device is reduced with a reduction in device size, and wiring delay becomes longer than device delays. Wiring then has become as important as the device itself. Future multilevel wiring will require five to seven levels. The multilayer wiring itself will not be easy to achieve, because of increased wiring cost, process complexity, and longer turnaround. We must overcome these problems.

The materials required for wiring so that ULSI performance and reliability in RISC (reduced instruction set computer), and CISC (complex instruction set computer) type processors and DSPs (digital signal processors) can be increased must have a lower resistivity and higher resistance to electromigration (EM) and stress migration (SM) than do aluminum alloys. Gold, copper, and silver are candidate wiring materials. Copper is especially attractive, but we must overcome several obstacles to take advantage of its potential.

This article will discuss wring and via resistance delay, Cu CVD technology, the surface reaction mechanism, copper patterning technology, copper oxidation and diffusion prevention, and copper wiring reliability.

Type
Copper Metallization in Industry
Information
MRS Bulletin , Volume 19 , Issue 8 , August 1994 , pp. 68 - 74
Copyright
Copyright © Materials Research Society 1994

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