Book contents
- Frontmatter
- Contents
- Preface
- List of gate symbols
- 1 Introduction
- 2 Fault models
- 3 Combinational logic and fault simulation
- 4 Test generation for combinational circuits
- 5 Sequential ATPG
- 6 IDDQ testing
- 7 Functional testing
- 8 Delay fault testing
- 9 CMOS testing
- 10 Fault diagnosis
- 11 Design for testability
- 12 Built-in self-test
- 13 Synthesis for testability
- 14 Memory testing
- 15 High-level test synthesis
- 16 System-on-a-chip test synthesis
- Index
Preface
Published online by Cambridge University Press: 05 June 2012
- Frontmatter
- Contents
- Preface
- List of gate symbols
- 1 Introduction
- 2 Fault models
- 3 Combinational logic and fault simulation
- 4 Test generation for combinational circuits
- 5 Sequential ATPG
- 6 IDDQ testing
- 7 Functional testing
- 8 Delay fault testing
- 9 CMOS testing
- 10 Fault diagnosis
- 11 Design for testability
- 12 Built-in self-test
- 13 Synthesis for testability
- 14 Memory testing
- 15 High-level test synthesis
- 16 System-on-a-chip test synthesis
- Index
Summary
The fraction of the industrial semiconductor budget that manufacturing-time testing consumes continues to rise steadily. It has been known for quite some time that tackling the problems associated with testing semiconductor circuits at earlier design levels significantly reduces testing costs. Thus, it is important for hardware designers to be exposed to the concepts in testing which can help them design a better product. In this era of system-on-a-chip, it is not only important to address the testing issues at the gate level, as was traditionally done, but also at all other levels of the integrated circuit design hierarchy.
This textbook is intended for senior undergraduate or beginning graduate levels. Because of its comprehensive treatment of digital circuit testing techniques, it can also be gainfully used by practicing engineers in the semiconductor industry. Its comprehensive nature stems from its coverage of the transistor, gate, register-transfer, behavior and system levels of the design hierarchy. In addition to test generation techniques, it also covers design for testability, synthesis for testability and built-in self-test techniques in detail. The emphasis of the text is on providing a thorough understanding of the basic concepts; access to more advanced concepts is provided through a list of additional reading material at the end of the chapter.
- Type
- Chapter
- Information
- Testing of Digital Systems , pp. xiii - xvPublisher: Cambridge University PressPrint publication year: 2003