Book contents
- Frontmatter
- Contents
- Preface
- List of gate symbols
- 1 Introduction
- 2 Fault models
- 3 Combinational logic and fault simulation
- 4 Test generation for combinational circuits
- 5 Sequential ATPG
- 6 IDDQ testing
- 7 Functional testing
- 8 Delay fault testing
- 9 CMOS testing
- 10 Fault diagnosis
- 11 Design for testability
- 12 Built-in self-test
- 13 Synthesis for testability
- 14 Memory testing
- 15 High-level test synthesis
- 16 System-on-a-chip test synthesis
- Index
10 - Fault diagnosis
Published online by Cambridge University Press: 05 June 2012
- Frontmatter
- Contents
- Preface
- List of gate symbols
- 1 Introduction
- 2 Fault models
- 3 Combinational logic and fault simulation
- 4 Test generation for combinational circuits
- 5 Sequential ATPG
- 6 IDDQ testing
- 7 Functional testing
- 8 Delay fault testing
- 9 CMOS testing
- 10 Fault diagnosis
- 11 Design for testability
- 12 Built-in self-test
- 13 Synthesis for testability
- 14 Memory testing
- 15 High-level test synthesis
- 16 System-on-a-chip test synthesis
- Index
Summary
In this chapter, we discuss methods for diagnosing digital circuits. We begin by identifying the main objectives of diagnosis and defining the notions of response, error response, and failing vectors for a circuit under test (CUT), the fault-free version of the circuit, and each circuit version with a distinct target fault.
We then describe the purpose of fault models for diagnosis and describe the fault models considered in this chapter. The cause–effect diagnosis methodologies follow. In these methodologies, each faulty version of the circuit is simulated, implicitly or explicitly, and its response determined and compared with that of the CUT being diagnosed. We first describe post-test diagnostic fault simulation approaches where fault simulation is performed after the CUT response to the given vectors is captured. Subsequently, we describe fault-dictionary approaches where fault simulation is performed and the response of each faulty version stored in the form of a fault dictionary, before diagnosis is performed for any CUT.
Next, we present effect–cause approaches for diagnosis which start with the CUT response and deduce the presence or absence of a fault at each circuit line.
Finally, we present methods for generating test vectors for diagnosis.
Introduction
Diagnosis is the process of locating the faults present within a given fabricated copy of a circuit. For some digital systems, each fabricated copy is diagnosed to identify the faults so as to make decisions about repair.
- Type
- Chapter
- Information
- Testing of Digital Systems , pp. 482 - 559Publisher: Cambridge University PressPrint publication year: 2003